Synopsys' DesignWare® ARC® 600 Family of 32-bit RISC processor cores are optimized for embedded applications and DSP tasks where high performance and low power consumption is required. To address a wide range of processing needs, the DesignWare ARC 600 family includes flexible memory options such as single-cycle Closely Coupled Memories (CCMs) for instructions and data, as well as configurable I-cache and D-cache.
The ARC 600 family includes the ARC 601, ARC 605, ARC 610D and ARC 625D processors. The processors are highly configurable so that each instance can be tailored to achieve the optimum balance of performance, power and area, enabling SoC designers to optimize the processors for their specific target applications. The ARC 600 processors are also extensible, allowing designers to add their own custom instructions to dramatically increase performance.
Optional DSP and floating point unit (FPU) capabilities enable designers to address a wide range of processing requirements with a single host application processor. Using a single processor simplifies the design, lowers silicon-area and enables faster debug of the chip.
DesignWare ARC processor cores are supported by a variety of 3rd-party tools, operating systems and middleware from leading industry vendors, including members of the ARC Access Program.