A: Logic synthesis needs to keep evolving as new designs appear, in terms of size, complexity, and technology. In terms of size, some of the optimizations that were scaling OK a decade ago, and are really key to delivering on PPA, need a fundamental re-thinking today at both the algorithmic and software engineering levels. This is a golden opportunity for innovation in synthesis: often when trying to push scalability to the next level, new ideas come up to generate more PPA benefits.
In terms of complexity, our customers’ designs are not only growing larger but also becoming more sophisticated. Handling a relatively small but complex logic reasoning problem can be equally challenging as solving larger problems. For example, in the SAT-solving community, there are known problems with hundreds of inputs that take more time to solve than some problems with tens of thousands of inputs. Now back to synthesis. AI is clearly a strong driver in the growing complexity of modern designs. On the one hand, AI brings together new architectures and deeper interconnection among computational elements, e.g., neural networks. Synthesis needs to keep up to grab all of the PPA advantages on the table, with good runtime, for these designs. On the other hand, AI enables automatic generation of RTL that can be finally configured by the user. In this context, synthesis is asked to find more opportunities to simplify the design as compared to traditional handwritten RTL, where the designer carefully optimizes each line of RTL code.
As far as technology goes, with CMOS node scaling slowing down, synthesis needs to step up and boost the innovation cycle to compensate. And when dealing with the advanced 3nm/2nm nodes, we need more technology-aware synthesis methodologies to address the challenges seen in such small geometries. Moreover, as post-CMOS alternatives, such as superconducting electronics, are under investigation by industry and academia, new logic synthesis approaches often become essential to permit a fair evaluation on these nanotechnologies – especially when they have different logic abstractions than standard CMOS.