Krishnamoorthy kicked off the Symposium by discussing scaling chip designs with increased complexity and details around how AI, data analytics, and other tools can help designers meet PPA goals. He talked about the progression of Moore’s law and how, even though many semiconductor technologies are advancing, a new approach is needed to bring design up to speed.
“Performance and power are definitely not growing at the same trajectory as before. We need to overcome this, because of the relentless innovation that’s happening in the semiconductor industry, to drive this next level of improvement.” – Shankar Krishnamoorthy, General Manager, Digital Design Group, Synopsys
That challenge needs to be solved, and there is a solution – a “booster pack,” as Krishnamoorthy describes, which increases power and performance by applying domain-specific architectures, 3DIC designs, and AI with a SysMoore era architecture. He also addresses how Synopsys tackles power and performance challenges, and the rising cost of engineering productivity, with a six-vector roadmap.
To learn about these key drivers and more, watch Krishnamoorthy’s full session, Boosting Productivity and Robustness in the SysMoore Era with a Triple-play of Hyperconvergency, Analytics, and AI Innovations.