The semiconductor and electronic design automation (EDA) industries are full of innovation and creativity. The exponential technology curve needed to fuel continued innovation and growth cannot and will not be stopped.
In this new setting of a slowing Moore’s Law, the industry is now innovating in other ways. Examples include new architectures such as parallel algorithms and new approaches to computation, often assisted by artificial intelligence (AI) techniques.
At the hardware level, something fundamental is happening as well. The huge, single-chip approach to design is starting to be replaced with multiple pieces of silicon, each with a specific purpose and all integrated in one package using new and very dense integration techniques.
This integration technique is referred to as 2.5D or 3D design. It forms the basis for a new way to build complex system-on-chip, or SoC, designs. Rather than one large, monolithic chip containing the system, a collection of smaller chips, including chiplets and dense memory stacks, now contain the system and all of these devices are integrated into one sophisticated package, giving rise to system-in-package, or SiP, design.