Defining the AI Era with the IBM Research AI Hardware Center

Arun Venkatachar

Oct 20, 2020 / 4 min read

While there is no shortage of discussions, press announcements, or general buzz around the term artificial intelligence (AI), very few companies grasp the essence of what is required to truly realize the immense potential of enabling machines to have cognitive capabilities. IBM is certainly among those that do, and is innovating at a very fast pace in the AI hardware space.

AI is woven across just about every aspect of IBM these days, and the company’s legacy in hardware design provides deep insights into the importance of the silicon foundation to power AI applications. So, it makes sense that its renowned IBM Research organization has established an operation specifically dedicated to advancing AI semiconductors. Its AI Hardware Center is a global research hub that brings together industry, academic, and government partners with a straightforward goal: exceed the historical trend of more than doubling the efficiency of computing for AI each year and continue this until the end of the decade.

The AI Hardware Center shows that IBM understands some essential truisms about progressing AI.

First, existing CPU- and GPU-driven approaches to enabling machine learning, inferencing, neural networks, and other key ingredients to the AI recipe are insufficient and too narrow in their application. In order to expand towards fluid intelligence, AI needs a dedicated approach to end-to-end hardware development in order to proliferate. It includes new computing accelerators, technologies, and architectures designed and optimized specifically for AI computation. It also entails broad expertise in algorithms, software, system integration, and applications. This will also require an unprecedented level of performance to power the algorithms AI needs to solve the toughest problems — orders of magnitude more than we have today.

The mission of the AI Hardware Center is clear, as stated in a blog post from IBM Research:

The coming generation of AI applications will need faster response times, bigger AI workloads, and multimodal data from numerous streams. To unleash the full potential of AI, we are redesigning hardware with AI in mind: from accelerators to purpose-built hardware for AI workloads, like our new chips, and eventually quantum computing for AI.

It Takes a Village

Second, this will not be a battle fought alone. When IBM announced the launch of the AI Hardware Center, it clearly stated: “Partnerships within an open ecosystem are key to advancing hardware and software innovations that are the foundation of AI.” The AI Hardware Center effort was a collaboration from the start, and IBM tapped leaders from across the technology value chain. Synopsys joined IBM early on as the leader in tools, methodologies, and IP for complex SoC design.

Synopsys participation includes both technology and engineering personnel collaborating with the IBM researchers and other partners. Many of our tools are being used to drive progress, and we are contributing in three key areas:

  • Multi-die integration in a package, Silicon Design & Verification, with Synopsys 3DIC CompilerFusion Design Platform™, and solutions that address the entire verification continuum, including the use of the Synopsys HAPS® Prototyping system and the ZeBu® Server emulation system. HAPS and ZeBu address verification challenges arising from the size and scale of the designs being developed and deliver support for hardware and software co-design and co-analysis methodologies. This use of Synopsys’ emulation system helps IBM and its partners develop application software before hardware is commercialized. Synopsys’ software-based verification technologies, including tools to perform detailed rules-driven logic verification, formal verification, and detailed power and timing analysis are also essential to the program.
  • Silicon Engineering, which provides software to address critical manufacturing and yield challenges introduced by leading-edge process technologies such as the use of novel materials, gate-all-around 3D stacked architectures, and source and mask creation for EUV technology. Our Design Technology Co-Optimization (DTCO) solution combines our capabilities to provide more options and help achieve global optimality.
  • Silicon IP, which addresses the processing, memory performance, and real-time connectivity requirements of AI chips, providing a broad portfolio of silicon-proven DesignWare® IP such as LPDDR5 and PCI Express® 5.0 for a wide array of applications.

Progress Is Already Being Made

We’ve hit the ground running and have seen significant impact over the first 18 months of our collaboration. By closely working with Synopsys, the AI Hardware Center has achieved several tapeouts and test chips of designs targeting advanced process manufacturing nodes and has helped the initiative maintain its aggressive roadmap. Part of the roadmap to reach 1,000x performance improvement by 2029 was the delivery of AI processor cores that improved performance by 2.5x each year; IBM Research realized a gain of twice that in its first year.

We are proud to be part of such a select group that IBM has brought together to address the most significant challenges in AI hardware development. Our goals are synergistic, and each partner has a real stake in the game. This is no ivory tower research project — it’s grounded in the practical need by IBM itself to move the needle on AI to power its thriving commercial operations in high-performance computing and the cloud. It also has far-reaching implications across many industries — healthcare, finance, energy, environmental sustainability — and has the potential for many life-changing improvements we haven’t even thought of yet.

The work being done by the IBM Research AI Hardware Center is ambitious and significant. Our role in it is not typical of the traditional EDA business model. We believe it has game-changing potential in a world where everything is getting smarter.

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