The idea of “democratizing secure silicon” has far-reaching impact for government and business. Hardware attacks, from side-channel attacks to glitching to counterfeiting, continue to increase in frequency and severity. These threats ideally should be addressed across the entire hardware lifecycle, and one way to do it is via an electronic design automation (EDA) flow. The multi-phase AISS program is aimed at promoting hardware security through the automated inclusion of scalable hardware security mechanisms in semiconductor IP and SoCs. Collaborating with Synopsys in these efforts are Arm, Boeing, UltraSoC, the University of Florida Institute for Cyber Security (FICS), Texas A&M University, and the University of California, San Diego. For Synopsys, our role in the AISS program reflects our continued commitment to providing industry awareness, enablement, and leadership for secure silicon throughout the semiconductor lifecycle. We are excited that the AISS team recently completed phase 1 of the program and is now moving on toward further innovation and automation in phase 2.
Our second topic for the ERI Summit is a vision of 3DICs, a hot topic in the electronics industry. Vertical stacking of heterogeneous dies in a 3D package provides an architecture for the fast memory access bandwidth that is in demand for applications like high-performance computing, hyperscale data centers, AI, aerospace, defense, and networking. The architecture also provides a way to get more from Moore’s law, in terms of power, performance, and area (PPA). EDA vendors like Synopsys can help pave the path to a smoother, more efficient 3DIC development process through methodologies like design technology co-optimization and silicon lifecycle management, technologies like die-to-die interface IP and Synopsys 3DIC Compiler, as well as full design and verification flows and design services. With three decades of experience and a first-pass silicon track record, the Synopsys System Design Solutions team can help push 3D chip designs beyond their architectural limits, while keeping aggressive project schedules front and center. Our talk illustrates how 3DIC solutions and services can help reduce design size, weight, power, and cost (SWaP-C)—key areas of concern for aerospace and defense designs.