Designer's Digest

Issue #16: The Need for 3DIC Packaging and Multi-die Integration

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Welcome to the Designer's Digest!

This issue of Designer’s Digest is focused on understanding the semiconductor market’s increased need for multi-die integration in a package and Synopsys’ recent announcement of 3DIC Compiler, the industry’s first unified platform for multi-die integration. Read the 1 on 1 interview with Senior Vice President, Charles Matar where he discusses industry drivers and solutions in this growing area and watch the video and read the articles for more in-depth information.

1:1 with Charlie Matar

We sat down with Charles Matar, Senior Vice President of System Solutions & Ecosystem Enablement Group, to learn more about the current needs of the semiconductor market for higher levels of integration and performance and how multi-die integration in a package may address them. Prior to joining Synopsys, Mr. Matar was Vice President of North America for TSMC responsible for engineering support teams driving advanced and mainstream process technologies, RF, analog, and design enablement. He has also led teams at Intel, AMD, and Qualcomm, both as a GM and a Vice President of Product Development.

Read the interview

Video

Rising Package Complexity

Rita Horner discusses the design side of advanced packaging, including how tools are chosen today, what considerations are needed for integrating IP while maintaining low latency and low power.

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Article

The Need for 3DIC Packaging & Design Evolution

Multi-die systems are becoming increasingly complex to handle the needs of compute intensive markets.

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Press Release

3DIC Compiler

Synopsys Introduces the Industry's First Unified Platform to Accelerate Multi-die System Design and Integration

Webinars

Synopsys is increasing and implementing efficient means of communication, and are making concerted efforts to stay focused on customer success. We've recently created many new technical webinars to keep our customers up to date on the latest Synopsys innovations.

See the latest webinars

Enabling Next-Generation SoC Design with Machine Learning-Driven Implementation

May 28, 2020 - In this webinar, Synopsys and Samsung discuss machine learning (ML) opportunities across digital implementation and highlight how ML-driven engines are delivering breakthrough ...

Attain Best PPA on Advanced Arm® Cores with Fusion Compiler’s New ...

May 21, 2020 - This webinar will be kicked-off by Arm, who will share an overview of their latest, market-optimized HPC-core offerings, followed by a technology deep-dive by R&D from Synopsys’ Arm ...

Validating and Configuring a NoC IP with RTL Architect: The Experience of ...

May 19, 2020 - In this webinar, Synopsys and Arteris IP will explain how Synopsys RTL Architect helps ensure that the RTL IP Arteris releases meets the demanding market requirements and also how it...

Advances in Timing Signoff to Address Today’s Design Challenges

May 5, 2020 - In this webinar, we will discuss major advances in timing signoff technologies that address the new challenges. We will cover new techniques to optimize timing accuracy and alleviate ...

Prevent and Eliminate IR Drop and Power Integrity Issues Using RedHawk ...

Apr 9, 2020 - Watch this webinar to learn how to prevent and eliminate IR drop and power integrity issues using RedHawk Analysis Fusion.

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