Welcome to the Designer's Digest!

This issue of Designer’s Digest is focused on static timing analysis for advanced nodes and new market segments. New design and device architectures coupled with process variations are bringing new challenges to accurate, scalable timing analysis. In this issue, learn about these challenges, how the emerging needs are driving new requirements for timing tools and how Synopsys is helping designers tackle these topics.

1:1 with Feroze Taraporevala

We sat down with Feroze Taraporevala, R&D Vice President for timing and extraction technologies at Synopsys, to learn more about Synopsys' PrimeTime® static timing analysis solution, and how it can be used to address the emerging challenges for advanced nodes and new market segments, and to tackle customer needs for enhanced accuracy, performance and productivity.

Chalktalk Video: Smarter Library Voltage Scaling with PrimeTime

PrimeTime now provides more accurate library voltage scaling technology to eliminate this effort and reduce schedule risk, even at ultra-low voltages. 

PrimeTime Tool Demos 
Explore how PrimeTime's tool features can address cross-clocking reporting, fix ECOs, and accelerate debugging. 

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