With the DesignWare IP solution supporting multiple wireless specifications, years of analog and RF design experience, and a broad portfolio of silicon-proven IP shipping in volume, Synopsys provides a robust wireless IP solution for advanced IoT SoC designs.
- Silicon Design & Verification
- Products
- Solutions
- Resources
- Services
- Community
- Training
- Silicon IP
- Products
- Markets
- Newsletter
- Customer Success
- News
- Resources
- Company
- About Us
- Investor Relations
- Community
- Newsroom
- Resources
- Careers
< Silicon Design & Verification
Silicon Design & Verification
< Products
< Products
< Products
< Products
< Products
< Products
< Products
< Silicon Design & Verification
< Solutions
< Solutions
Cloud
Synopsys in the Cloud
< Solutions
< Solutions
Optical Design Solutions
Lighting Simulation Software
Optical Design Software
Automotive Lighting Design Software
< Solutions
< Solutions
< Silicon Design & Verification
< Resources
< Resources
Verification
Articles
Blogs
Datasheets
Events
News
Newsletters
Success Stories
Videos
Webinars
White Papers
< Resources
< Silicon Design & Verification
< Services
< Services
< Services
< Silicon Design & Verification
< Community
Community
Community Overview
< Community
< Community
< Community
< Community
< Silicon Design & Verification
< Training
< Silicon Design & Verification
Training
Training and Education
< main menu
< Silicon IP
Silicon IP
< Products
< Products
Processor Solutions
ARC Processor IP
Embedded Vision Processor IP
Development Tools
Operating Systems
Ecosystem
ASIP Tools
< Products
Memories & Libraries
Logic Libraries
Memory Compilers
Duet Packages
HPC Design Kit
Embedded Test & Repair
Non-Volatile Memory
< Products
< Products
Analog IP
Data Converters
< Products
< Products
< Products
< Silicon IP
< Markets
< Silicon IP
Newsletter
< Silicon IP
Customer Success
< Silicon IP
News
< Resources
< Resources
< main menu
< Software Integrity
Polaris Platform
Comprehensive application security from developer to deployment
< Software Integrity
< Software Integrity
< Software Integrity
Professional Services
Strategy and programs that address security before, during and after development
< Software Integrity
< Tools
< Tools
< Tools
< Tools
< Software Integrity
< Services
Managed Security Testing
Managed SAST
Dynamic Analysis (DAST)
Penetration Testing
Mobile Application Security Testing
Network Security Testing
< Services
Professional Services
Strategy and Planning
Architecture & Design
DevSecOps Integration
Cloud Security
Industry Solutions
< Services
< Software Integrity
< Training
< Training
Product Education
< Training
Community
< Software Integrity
< Solutions
< Solutions
< Resources
< Resources
< Software Integrity
< Software Integrity
Customers
< Partners
< Partners
Become a partner
< Software Integrity
< Software Integrity
Blog
< main menu
< About Us
Company
< About Us
< About Us
About Us
About Us
< Investor Relations
< About Us
Investor Relations
Investor Relations
< Community
< About Us
Community
Community
< Newsroom
< About Us
Newsroom
Newsroom
< Resources
< About Us
Resources
Resources
< Careers
< About Us
Careers
Careers
< main menu
Bluetooth, Thread, Zigbee IP Solutions
Overview
Synopsys’ DesignWare® IP for Bluetooth, Thread, and Zigbee enables secure and concurrent wireless connectivity with low-power consumption for extended battery life, targeting wireless audio, wearables, and smart IoT devices. The silicon-proven IP solution, consisting of compact PHYs and controllers (Bluetooth low energy Link Layer and IEEE 802.15.4 MAC), is Bluetooth-qualified with support for Bluetooth 5.2, mesh, and isochronous channels for LE Audio. In addition, the IP is compliant with Thread and Zigbee specifications. Integrating IP that adheres to industry standards enables designers to deliver energy-efficient IoT SoCs with less risk and accelerated time-to-market.
Products
Using IP to Make the Best Design Selections for HDMI and DisplayPort SoCs
How to Use MIPI Interfaces to Accelerate Camera and Display SoC Designs
In-System Safety and Reliability for Automotive SoCs using Innovative Memory IP
Pitfalls of IP Power Estimation for AI & Vision SoCs and How to Avoid Them