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The Synopsys DDR5 MRDIMM2 Controller IP is a next-generation memory controller designed to deliver optimal latency, bandwidth, and area efficiency. It supports JEDEC-standard DDR5 RDIMMs as well as Gen2 MRDIMMs, offering extensive configurability to accommodate diverse system architectures. This versatility makes it an ideal solution for applications ranging from data centers to digital home environments, meeting a broad spectrum of design requirements.
The Synopsys DDR5 MRDIMM2 Controller IP is a next-generation memory controller designed to deliver optimal latency, bandwidth, and area efficiency. It supports JEDEC-standard DDR5 RDIMMs as well as Gen2 MRDIMMs, offering extensive configurability to accommodate diverse system architectures. This versatility makes it an ideal solution for applications ranging from data centers to digital home environments, meeting a broad spectrum of design requirements.
The Synopsys DDR5 MRDIMM2 Controller interfaces with the Synopsys DDR5 MRDIMM2 PHY using the DFI 5.2 interface, forming a comprehensive memory interface solution. It features software configuration registers accessible through an AMBA 3.0 APB interface and offers controller initialization (CINIT) and subsystem initialization (SINIT) software libraries to facilitate the generation of initialization sequences.
Highlights & Key Features
- Supports JEDEC standard DDR5 RDIMMs and Gen2 MRDIMMs
- High-performance data rates achieving up to 12.8 Gbps
- Supports DDR5 RDIMM 1N and 2N mode
- Supports DDR5 MRDIMM Mux 1N and 2N mode
- Multiport Arm® AMBA® interface (CHI™/ AXI™4) with managed QoS or single-port host interface to the DDR controller
- DFI 5.2 compliant interface to Synopsys DDR5 MRDIMM2 PHY
- Best in class performance with unique features such as QoS-based scheduling and phase-aware scheduling
- High-bandwidth design using a configurable CAM, from 64 up to 256 CAM individual entries for reads and writes; latency as low as 5 clock cycle typical
- Lowest latency interface (HIF)
- UVM testbench to include the DDR5 MRDIMM2 PHY into a verification environment
- Option to Integrate with Synopsys Inline Memory Encryption (IME) to provide data confidentiality
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