The Synopsys Ethernet GMAC IP enables the host to communicate data using the Gigabit Ethernet protocol (IEEE 802.3) at 10M, 100M, and 1G speeds. The IP is composed of three main layers: The Gigabit Ethernet Media Access Controller (GMAC), the MAC Transaction Layer (MTL), and the MAC DMA Controller (MDC). The MTL is highly configurable enabling optimum performance supporting a wide range of implementations based on end-system applications. A multitude of application interfaces are supported as well for easy SoC integration. Silicon-proven and designed for easy integration into ASICs and FPGAs the Synopsys GMAC IP comes with a user-friendly application interface so designers can easily set their functional and implementation objectives to meet design requirements. The IP is verified using state-of-the-art methodologies to reduce risk. This includes the RTL design, verification, hardware verification and interoperability tests.
The Synopsys Ethernet IP solutions consist of configurable controllers and silicon-proven PHYs supporting speeds of up to 100G, verification IP, IP Prototyping Kits, Software Development Kits and Interface IP Subsystems.
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