Synopsys HBM4 Controller IP

The Synopsys HBM4/4E Controller IP is optimized for power, latency, bandwidth, and area, supporting the JEDEC standard. Synopsys offers two controller options. The standard HBM4/4E controller connects to the Synopsys HBM4 PHY through the extended DFI 5.1 interface, creating a complete memory interface solution. The custom HBM4/4E (cHBM4/4E) controller is an extension of the standard HBM4/4E that shifts the memory controller into the base die and integrates with a TSV (Through Silicon Via) PHY. The HBM4/4E controllers include software configuration registers through the Synopsys AMBA APB v2.0 specification interface. The controllers also include the advanced dynamic memory access command scheduler (eg. CAM, QoS), memory protocol handler (e.g. refresh, refresh management), power saving capabilities (eg. self-refresh, power down, DFI low power, frequency change), reliability features (read/write DQ parity, CA parity, single error correction—double error detection error correcting code—SEC-DED ECC, CRC16, CRC15+KBD), PHY management and DRAM maintenance control (controller update, PHY update, controller message) and pseudo channel support.