Linley Fall Processor Conference 2020

This year, the Linley Fall Processor Conference will feature virtual presentations that run half days on October 20-22 and 27-29, 2020. Attendees will be able to view live-streamed presentations and interact with the speakers during panel discussions, breakout sessions, or scheduled one-on-one meetings.

Synopsys Presentation

Thursday, October 22 at 9:10 a.m. - 9:30 a.m. PT

*9:30 a.m. - 10:00 a.m. PT - Q&A Panel Discussion to follow

Synopsys' Fergus Casey will be presenting via a live webinar on Thursday, October 22. Details on the live webinar to follow.

Architecting Safe & Secure Solutions for Autonomous Vehicles

Computer vision can eliminate human error and make vehicles safer – effectively removing driver uncertainty. Autonomous vehicles are expected to save almost 300,000 lives per decade in the United States alone. But despite decades of concepts and development, ubiquitous “driverless” vehicles seem a distant reality. This presentation will explore the challenges that SoC designers and OEMs face when developing autonomous vehicles and will describe key milestones and metrics that the industry, and SoC designs, must achieve to enable autonomous driving.


Fergus Casey, Director, R&D, ARC Processors

Fergus Casey is Director of R&D for Processor IP at Synopsys with responsibility for Processor IP development across a broad portfolio including ARC RISC/DSP Processors, Embedded Vision and AI engines, and Safety and Security ready cores.

Over the years with Synopsys, Fergus’ team has been first to market with state-of-the-art Security and Safety ready processors and their products have won industry awards from the Linley Group and Embedded Vision Alliance. 

Prior to joining Synopsys, Fergus worked in a number of fabless semiconductor and IP startups. Fergus holds a bachelor’s degree in electrical engineering from University College Cork, Ireland.

One-on-One Meetings

Thursday, October 22 at 1:30 p.m. - 3:30 p.m. PT

Schedule a 1-1 meeting to meet with our presenter or other Synopsys expert who can answer your questions about processor design.

The one-one meetings will be a 15-minute prescheduled meeting between 1:30 - 3:30 p.m. Pacific Time and will be a live interactive meeting in a private Zoom room. This will be on a first-come first-served basis. Starting one week prior to the conference, one-one meetings can be scheduled through an on-line calendaring application. Once you reserve a meeting time, you will receive a link to access the Zoom room at your designated time slot.