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Synopsys Processor Solutions Videos
Unrivaled Efficiency for Embedded Applications
The Synopsys ARC® Processor IP portfolio consists of ARC-V™ RISC-V based processors, proven 32-/64-bit CPU IP, DSP IP, Neural Network Processing Unit (NPU) IP, subsystems and software development tools. The Synopsys ARC Processors key benefits are:
- Power and area efficient, achieving maximum performance with minimum power consumption and smaller area
- Highly configurable, allowing designers to optimize the performance, power and area of each processor instance on their SoC by implementing only the hardware needed
- Extensible ISA supports user-defined custom instructions, enabling integration of users’ proprietary hardware to accelerate application-specific tasks
- Integrated tool suite with broad hardware and software ecosystem support
Optimizing Sensor Fusion: The High-Performance Synopsys ARC VPX DSP Processor IP
Accelerate time-to-market running Ubuntu Linux on Synopsys ARC-V RPX Processor IP
Rapidly Develop and Debug Software for ARC-V RMX Processor-based SoCs
Synopsys Platform Architect Tool Running on ARC NPX6 NPU Processor IP
IAR Development Tools on Synopsys ARC-V RISC-V Processor IP | Synopsys
Ashling Development Tools on Synopsys ARC-V RISC-V Processor IP
LDRA Development Tools on Synopsys ARC-V RISC-V Processor IP
TASKING Development Tools on Synopsys ARC-V RISC-V Processor IP
Lauterbach TRACE32 Development Tool on Synopsys ARC-V RISC-V Processor IP
Sensor Cortek Demonstration of SmarterRoad Running on Synopsys ARC NPX6 NPU Processor IP
Inuitive Demo of a RGBD Sensor Using Synopsys ARC-based NU4100 AI & Vision Processor
Synopsys and TASKING RISC-V Solutions for Safety and Security Critical Automotive Applications
ARC VPX DSPs - Scalable Vector Processing for High-Performance Embedded Applications
Synopsys ARC-V Processor IP – Shaping the Future of RISC-V Now
Synopsys NPX Neural Processor IP for Generative AI
Synopsys ARC-V RISC-V Processor IP
ARC Processor IP – Unrivaled Power-Performance Efficiency for Embedded Applications
ARC Processor Summit 2022
Perceive Ergo SoC with ARC Processor & Security IP
Synopsys ARC® NPX Neural Processing Unit IP – Industry’s Highest Performance NPU IP
Inuitive NU4000 SoC with ARC EV Processor for Depth Sensing
Achieving Higher Safety and Security in Autonomous Vehicles (Episode 1 of 3)
Achieving Higher Safety and Security in Autonomous Vehicles (Episode 2 of 3)
Achieving Higher Safety and Security in Autonomous Vehicles (Episode 3 of 3)
Fast & Accurate 3D Object Detection for LiDAR with DesignWare ARC EV Processor IP
Moving Natural Language Processing (NLP) to the Edge with DesignWare ARC VPX Processor IP
Accelerate Intelligent SLAM with DesignWare ARC EV Processor IP
Vibrant Super Resolution (SR-GAN) with DesignWare ARC EV Processor IP
Demo: Inuitive NU4000 SoC with ARC EV Processor Running SLAM and CNN
Demo: Low-Power Machine Learning Inference with DesignWare ARC EM9D Processor IP
Demo: Combining SLAM and Object Detection with DesignWare ARC EV Processor IP
Emerging Neural Network Topologies for Vision Applications
Tracing OpenVX and CNN Applications on EV6x Embedded Vision Processors
Architecture and Design Techniques for Embedded Deep Learning
What You Don’t Know Can Hurt You: Security 101 for Embedded Vision
Solving Computer Vision Problems Using Traditional and Neural Network Approaches
Veridify’s Fast, Quantum Resistant Authentication and Data Protection for ARC Processors
Ashling Opella-XD and Ultra-XD for ARC Debug and Trace
ULSee Real-Time Facial Recognition & Liveness Detection System using ARC EV62 Processors ARC Summit 2019
ARC Processor Summit 2019 Keynote: Designing in the Age of AI
Synopsys ARC Processors – Your Embedded Edge Starts Here
Synopsys Demo of ASIL-D Ready DesignWare ARC EV6x Embedded Vision Processor IP for Safe Auto SoCs
Synopsys Demo of Performance Scaling On the ARC EV6x Embedded Vision Processor IP with CNN Engine
Synopsys and Inuitive Demonstration of DesignWare ARC EV6x Processor IP in NU4000 SoC
Inuitive Demonstrates NU4000 Artificial Intelligence SoC with DesignWare EV6x at CES 2019
SecureRF Accelerates Cryptographic Processing with DesignWare® APEX Extensions
MulticoreWare Demonstrates Object Tracking and Pose Recognition at ARC Summit 2018
Using Percepio Tracealyzer to Profile OpenVX Applications on ARC EV6x Vision Processors
DesignWare ARC HS Development Kit Demonstration
Look Ma! No Hands! Test & Repair Requirements for Autonomous Vehicles
Create Rapid and Efficient Processor Designs Using the ARChitect Configuration Tool for ARC Processors
Addressing the Rapid Growth of the Storage Market with ARC® Processors
Addressing Flash Storage Design Challenges with DesignWare® ARC® Processors
Meeting Your Flash Storage Needs with ARC Processors
Designing Very Low-Power Flash Storage Solutions with DesignWare ARC EM Processors
PathPartner & Synopsys: Building the Future of Embedded Vision
Morpho & Synopsys: Accelerating Embedded Vision Solutions
Alango and Synopsys: Partnering for Success
Percepio and Synopsys: Partnering for Success
Demonstration: Visualizing RTOS Behavior with Percepio Tracealyzer
Think Silicon and Synopsys: Partnering for Success
Demonstration: AgileSec Trust Management Root
ARC Processors for Safety-Critical Automotive Applications
Improve performance for your storage application with high-speed ARC HS processors
Zephyr Project Testimonial Video
What is an Embedded Vision Processor?
Running LEDE (OpenWrt) on the ARC® AXS103 Software Development Platform
Introduction to Embedded Vision
embARC SmartHome Demo: Part 1 - Introduction to Smart Home Demo Application
embARC SmartHome Demo: Part 2 - Host and Target Development Environment Requirements
embARC SmartHome Demo: Part 3 - Host and Target Development Environment Setup Instructions
embARC SmartHome Demo: Part 4 - Configuring the Amazon AWS IoT Cloud Service
embARC SmartHome Demo: Part 5 - Building and Running the Application
How to add Custom instructions to your ARC Processor with APEX technology
Secure Your IoT Device with Ultra-Low Power ARC Processors
DesignWare EV6x Processors for High-Performance Vision Applications
Debugging with ARC Real-Time Trace
IoT Always-on Demonstration using the DesignWare® Smart Data Fusion IP Subsystem
9D Sensor Fusion Demonstration Featuring DesignWare Sensor IP Subsystem
Synopsys ARC EM DSP Processors for Low-Power Embedded Systems
Object Detection Demo with DesignWare EV Family of Vision Processors
embARC Open Software Platform Accelerates Development of ARC Processor-based Embedded Systems
Getting Started with MetaWare on the ARC EM Starter Kit
Synopsys Launches DesignWare ARC Software Development Platforms
Synopsys’ New DesignWare® ARC® HS Processors for Next-Generation Embedded Systems
Introducing the DesignWare Sensor IP Subsystem
Industry’s First Complete Audio IP Subsystem
MDB Session 1: Starting and Configuring the Debugger
MDB Session 2: Debugger Window Organization
MDB Session 3: Controlling Program Execution
MDB Session 4: Using Source and Disassembly Windows
MDB Session 5: Using Breakpoints and Watchpoints
MDB Session 6: Viewing Local and Global Variables and the Call Stack
MDB Session 7: Viewing Core and Auxiliary Registers and Memory
MDB Session 8: Execution Profiling
MDB Session 9: Multicore Debugging
Additional Resources:
- More information on Synopsys Processor Solutions
- Processor IP Portfolio Brochure
- View other Silicon IP Videos
