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IP Subsystems Videos

Configurable, Pre-Verified Hardware and Software Solutions

  • Integrated, pre-verified, SoC-ready subsystems reduce SoC design and integration effort 
  • Highly configurable with tightly integrated peripherals and dedicated hardware maximize processing efficiency

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Why Now Is the Time to Address Quantum Computing’s Impact on Cryptography

Stay Ahead of Threats and Attacks: Protect Data Across SoC Interfaces

New USB 80Gbps Specification Boosts Data Rate, Enables Four Protocols on One Bus

Intrinsic ID Collaborates with Synopsys to Boost SoC Security and Accelerate Time to Market

Synopsys IP Passes PCIe 5.0 Compliance and Makes Integrators List

Synopsys Introduces Industry’s Highest Performance Neural Processor IP

Simplify & Streamline Development of ISO 26262 Compliant Automotive SoCs

Overcoming PCIe 6.0 System Integration and Pre-Silicon Validation Challenges

Embedded Applications Get a Helping Hand: Extensible Processor Architectures

MIPI DevCon 2022

PCI-SIG Devcon 2022

ECOC 2022

Linley Fall Processor Conference 2022

Perceive Ergo SoC with ARC Processor and Security IP

Synopsys ARC NPX Neural Processing Unit IP – Industry’s Highest Performance NPU IP

Demo: Visidon DMS on ARC EV7x

Software Self-test as a Safety Mechanism for Processing Units

How the Doubling of Interconnect Bandwidth with PCI Express® 6.0 Impacts IP Electrical Validation

How Low Can You Go? Pushing the Limits of Transistors

Novatek Achieves First-Pass Silicon Success for Mobile Display SoC

Achronix Achieves First-Pass Silicon Success for High-Performance Computing FPGAs

Arbe Achieves First Silicon Success for 4D Imaging Radar SoC with DesignWare IP

PODCASTS

An All Inclusive Journey to HPC/Data Center Silicon Success

From Data Centers to Devices – The Ongoing [R]Evolution of AI Computing

Technical Bulletin: Latest IP Info on Secure Interfaces, 112G Ethernet, CXL and Narrowband IoT.

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