Synopsys' DesignWare® ARC® Processors are 32-bit CPUs that SoC designers can optimize for a wide range of uses, from deeply embedded to high-performance host applications.
The ARC HS Family includes the multicore-capable HS34, HS36 and HS38 processors. The HS34 is a high-performance cacheless processor, while the HS36 includes up to 64KB of instruction and data caches. The HS38, optimized for applications running Linux, has a full-featured memory management unit (MMU) supporting a 40-bit physical address space and page sizes up to 16 megabytes, giving designers the ability to directly address a terabyte of memory with faster data access and higher system performance. All three processors are available in dual- and quad-core configurations. The HS processors are optimized to deliver maximum performance efficiency (DMIPS/mW and DMIPS/mm2), making them ideally suited for embedded applications with high-speed data and signal processing requirements. The high degree of configurability and extensible instruction set allows designers to tailor each HS processor instance on their SoC for the optimum balance of performance, power and area.
All ARC processor cores are supported by a robust ecosystem of software and hardware development tools, including the MetaWare Development Kit, a complete solution for developing, debugging, and optimizing embedded software on ARC processors, the MQX real-time operating system (RTOS) and a portfolio of third-party tools, operating systems and middleware from leading industry vendors through the ARC Access Program.