- Silicon Design & Verification
- Silicon IP
- Software Integrity
- About Us
- Silicon Design & Verification Products
- Solutions
- Resources
- Services
- Community
- Training
- Silicon IP Products
- Solutions
- Resources
- Services
- Community
- Software Integrity
- Tools & Services
- Training & Education
- Solutions
- Resources
- Support
- Partners
- About Us
< Silicon Design & Verification Products
< Silicon Design & Verification Products
< Silicon Design & Verification Products
< Silicon Design & Verification Products
3D Image Processing
Simpleware Products
Simpleware for Life Sciences
Simpleware for Materials & Manufacturing
< Silicon Design & Verification Products
< Silicon Design & Verification Products
< Silicon Design & Verification Products
Photonic Solutions
PIC Design Suite
< overview
Silicon Design & Verification Products
+
Design
+
System Simulation & Modeling
+
Verification Continuum
+
3D Image Processing
+
Silicon Engineering
+
Optical Solutions
+
Photonic Solutions
< Solutions
< Solutions
< Solutions
< Solutions
< overview
< Resources
< Resources
< Resources
< overview
< Services
< Services
< Services
< Community
Community
Community Overview
< Community
< Community
< Community
< Community
< Community
< Community
< Community
< overview
Community
+
Community
+
SNUG
+
Partners
+
EmbARC.org
+
Interoperability
+
Academic Programs
+
Company Blogs
+
BSIMM
< Training
< overview
< main menu
< Silicon IP Products
< Silicon IP Products
Memories & Libraries
Logic Libraries
Memory Compliers
Duet Packages
HPC Design Kit
Embedded Test & Repair
Non-Volatile Memory
< Silicon IP Products
< Silicon IP Products
Processor Solutions
ARC Processor IP
Embedded Vision Processor IP
Development Tools
Operating Systems
Ecosystem
ASIP Tools
< Silicon IP Products
< Silicon IP Products
< Silicon IP Products
< Silicon IP Products
< Silicon IP Products
< overview
Silicon IP Products
+
Interface IP
+
Memories & Libraries
+
Analog IP
+
Processor Solutions
+
IP Subsystems
+
Security IP
+
Market Segments
+
IP Accelerated
+
SoC Infrastructure IP
< Solutions
< Resources
< Services
< Services
< Services
< Community
Community
Community Overview
< Community
< Community
< Community
< Community
< Community
< Community
< Community
< overview
Community
+
Community
+
SNUG
+
Partners
+
EmbARC.org
+
Interoperability
+
Academic Programs
+
Company Blogs
+
BSIMM
< overview
Software Integrity
< Tools & Services
< Tools & Services
Professional Services
Strategy and Planning (BSIMM)
Architecture & Design
DevSecOps Integration
Cloud Security
Industry Solutions
< Tools & Services
Open Source Audits
< overview
< Training & Education
< Training & Education
Product Education
< overview
< Solutions
< Solutions
< Resources
< Resources
< Support
< Support
Contact Support
< Partners
< main menu
Software Integrity
+
Software Integrity
+
Tools & Services
+
Training & Education
+
Solutions
+
Resources
+
Support
+
Partners
< About Us
< About Us
< About Us
< About Us
< About Us
< About Us
Mathematical Functions for ARC HS Cores
The DesignWare® ARC® FastMath Pack for ARC HS processors is a set of hardware extensions and an accompanying set of software wrapper functions that provide a collection of additional instructions supporting a range of mathematical functions that can be used with all ARC HS processors. These include
- Basic saturating arithmetic
- Trigonometric functions
- Logarithmic and exponential functions
- Fractional division and square root functions
The instructions support 16-bit and 32-bit data types. In addition to the extension instructions, the FastMath Pack includes a number of extension auxiliary registers.
All FastMath instructions are encoded in 32-bit formats and observe all of the established rules for encoding ARCv2 instructions for use with ARC HS processors. The instructions are implemented in the APEX extension space using the major opcode 0x07. In addition, all FastMath instructions and register names have the prefix “FMP_” to ensure they do not create any namespace clashes with existing ARCv2 instructions or other customer-defined instructions.
The FastMath instructions significantly reduce cycle count compared to the same functions implemented in software. They are easy to use and implemented as standard C-functions in application code.
DesignWare ARC FastMath Pack for ARC HS Processors
Highlights
Products
Downloads and Documentation
- Mathematical functions for ARC
- HS processors
- Basic saturating arithmetic
- Trigonometric functions
- Logarithmic functions
- Exponential functions
- Square root functions
- Fractional division
- Support for 16-bit and 32-bit data types
- Significantly reduce cycle count
- and increase performance
- Implemented as standard
- C-functions in application code
| Description: | The FastMath Pack is a math processing accelerator for the ARC HS family |
| Name: | dwc_arc_fastmath_pack_for_hs |
| Version: | 3.0 |
| STARs: | Open and/or Closed STARs |
| myDesignWare: | Subscribe for Notifications |
| Product Type: | DesignWare Cores |
| Documentation: | |
| Download: | arc_hs_processor |
| Product Code: | B559-0 |