The industry’s highest performance simulation solution, used by most of the top semiconductor companies, Synopsys VCS® functional verification solution features Intelligent Coverage Optimization (ICO) that brings AI/ML into its arsenal. The solution can be deployed at all stages of testbench development to provide testbench visibility and analytics. Its reinforcement learning technology accelerates and improves coverage, exposing more bugs and reducing regression turnaround time. The tool has successfully uncovered many issues in stable testbenches, such as constraint inconsistency failures, SystemVerilog assertion (SVA) failures, incorrect constraint (both under-/over-constrained) specifications, UVM driver/monitor/checker/scoreboard problems, out-of-design specification bugs, and RTL deadlock issues.
For comprehensive planning, coverage, and execution management, the VCS solution is natively integrated with Synopsys Verdi® automated debug system, Synopsys VC Formal™ next-generation formal verification solution, Synopsys VC Execution Manager, and Synopsys VC VIP. All are part of the Synopsys Verification Continuum® platform.