Welcome to the latest issue of the ASIP eUpdate Newsletter, our bi-annual publication to keep you informed on topics related to application-specific instruction-set processor (ASIP) design. ASIPs are a proven solution for domain-specific/application-optimized processors, plus often serve as a more flexible yet equally efficient alternative to fixed RTL implementations, often referred to as programmable accelerators.
ASIPs come with an architecture and instruction set tuned for a specific application domain. They rely on similar techniques as used in the design of hardware accelerators to reach high performance and low power: heavy use of parallelism and specialized datapath elements. Yet ASIPs retain software programmability within their application domain, resulting in C/C++ programmable processors and accelerators with the lowest power possible.
Synopsys is the leader in ASIP design solutions, offering tools, example processor models, and services. This newsletter covers the latest enhancements to ASIP Designer, the leading ASIP tool solution, and it highlights the wide range of processor models available to jump-start your design. It shows how companies like Fuji Xerox and Conexant have successfully deployed ASIPs for very different applications. And in the methodology section, it has a more detailed look at the subject of software-development kit (SDK) creation for existing and upcoming in-house processors.