The compiler’s application language front-end supports the programming languages C, C++ and OpenCL C. It translates source code into an intermediate representation in the form of a control and data flow graph (CDFG), in which nodes represent operations and edges represent dependencies. Users have a choice between ASIP Designer’s original front-end with powerful optimizations for digital signal processing applications, and a version of the Clang front-end from the open-source compiler project LLVM that was extended to support the broad architectural scope of ASIP architectures.
The compiler’s nML front-end translates the nML processor description into an intermediate representation in the form of an instruction-set graph (ISG). Nodes in the ISG represent primitive functions alternated with storage elements (e.g. memories, registers), and edges represent connectivity. The ISG is closer to a hardware representation than machine models of traditional compilers. It represents all processor resources, data types, connectivity, the instruction encoding, instruction-level parallelism and the instruction pipeline. Note that the ISG representation is also used by ASIP Designer’s RTL generator, where it is a basis for generating an RTL netlist of the processor. In the context of the compiler however, the ISG can be viewed as a superposition of all data-flow patterns that are legal on the processor.
In multiple steps referred to as compilation phases (depicted as blue boxes in the lower-right of Figure 5), the compiler maps the CDFG representation onto the ISG representation. Compilation phases are fired by a code generation engine that can cope with phase coupling, i.e. mutual dependencies between phases are accounted for to generate efficient code.
Every compilation phase implements advanced optimization algorithms, which directly operate on the ISG representation that was derived from the nML model. Unlike traditional compilers there is no need to develop architecture-specific optimization phases. Architecture designers and software engineers can retarget the compiler autonomously, merely by modifying the nML model.
A few key optimization algorithms are introduced next.