Cloud native EDA tools & pre-optimized hardware platforms
Synopsys’ ASIP Designer™ is the market-leading tool suite for automating and accelerating the design of highly-efficient application-specific instruction-set processors. This includes both the design of the hardware as well as the corresponding software development kit (SDK), all being generated from a single description of the processor.
This online training provides a deep dive into the concepts, languages and files that are used to capture a processor design in ASIP Designer. In ASIP Designer the processor model of the target processor is described in the special-purpose nML language. nML is a domain specific register transfer level language that models the processor at the abstraction level of a programmer’s manual. In addition to the nML description, a processor model contains two processor headers:
The primitive processor header declares the primitive data types and the primitive functions used in the nML description.
The compiler processor header describes the mapping of C data types and operators to the processor primitive data types and functions.
Finally, the PDG language is used to capture the behavior of the primitive functions, of the processor control unit and of other processor modules.
The training comprises 6 modules:
Target audience: engineers who intend to develop an in-house processor, including a fully featured software development kit
Goal of the training: teach how to create a processor model for ASIP Designer
Prerequisites: basic knowledge of processor architectures, the C programming language, and RTL design