Cloud native EDA tools & pre-optimized hardware platforms
Depth-sensing camera technology is adding a new dimension to the world of computer vision. Affordable high-resolution depth-sensing cameras will change the way we interact with mobile devices, enabling augmented reality in visual communication and gaming, and driving the deployment of smart robots and drones in everyday life. To future-proof such camera systems while keeping system costs low, the sensory output located near the image sensor needs to be processed with software control. Application-Specific Instruction Set Processors (ASIPs) are the ideal technology to add intelligent processing to sensor systems at the lowest power and cost.
The Synopsys ASIP Designer tool suite enables system and chip designers to create their own ASIPs in a fraction of the time with the precise parallelization and customization required by the application. This webinar will show how to use the ASIP Designer tool suite to design an ASIP for application to dense mesh-based simultaneous localization and mapping (SLAM) algorithms and 3D reconstruction of dynamic environments from depth-sensing camera images. The ASIP architecture design only took four designers a month to complete. It is estimated that ASIP power consumption is 4 orders of magnitude lower than traditional GPU solutions and occupies only a small part of the silicon area.
Senior Director of Engineering
Gert Goossens is a Senior Director of Engineering at Synopsys, where he is currently leading the company’s tool development group for Application-Specific Instruction-set Processors (ASIPs). Previously, Gert was a co-founder and the CEO of Target Compiler Technologies, the company that pioneered the concept of ASIP tools and that was acquired by Synopsys in 2014. Gert holds MS and Ph.D. degrees from KU Leuven, Belgium.