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Integrated circuit design, or IC design, is a part of a larger body of knowledge known as electronics engineering. In the discipline of electronics engineering, there is a process known as circuit design. The goal of circuit design is to assemble a collection of interconnected circuit elements that perform a specific objective function. The ability to add or multiply numbers is a simple example. The development of a microprocessor that executes computer instructions to perform complex tasks is another example.

The circuit elements used in this process begin with fundamental building blocks such as transistors, resistors, capacitors, and wires. These elements are combined to form more complex functions such as logic gates or precision amplifiers, which are then combined to form more complex functions such as adders and multipliers. This process continues to build on itself, resulting in the availability of increasingly complex circuit building blocks. 

Circuit design utilizes discrete, pre-manufactured elements to form the circuit. In the case of IC design, there is an important difference. Here, the circuit elements are made from miniaturized components that are implemented on a silicon substrate using a process called photolithography. The photolithography process creates various geometric shapes on the silicon substrate where the electrical properties of the region defined by that shape are altered. Basic circuit elements are created when these regions are combined and superimposed over each other.

So, IC design consists of two distinct processes. First, circuit elements are assembled to perform the objective function. Next, the various geometric shapes that implement those circuit elements must be assembled and interconnected on the silicon substrate. The first process is typically called logic, or circuit, design and the second process is called physical design. Based on the type of signal being processed by the IC, a digital or analog methodology is used. In the case of an analog/mixed-signal, or AMS, design, both methodologies are used. In addition, how the various circuit elements fit the requirements of the design is also relevant. When circuit elements must be modified to achieve the requirements of the design, a full-custom design methodology is used.

Importance of IC Design

IC design is a critically important discipline. It forms the basis for the development of all microelectronic devices in use today. This includes the microprocessors that power laptop computers and cell phones, the image processing circuits that power computer monitors and television sets, and the sensors that are used in wearable and implanted medical devices. These microelectronic devices also allow the growing use of artificial intelligence (AI) that is opening new frontiers, such as autonomous driving, machine vision, and natural language processing. 

IC technology deployment has become widespread in our world, and IC design forms the foundational set of disciplines required to create these devices.

Overview of the different steps in an IC Design Flow

The process of IC design can be thought of as a series of hierarchical decomposition steps. High-level requirements are decomposed into more details with the goal of implementing a circuit on a silicon wafer that faithfully performs the objective function. The primary steps that make up an IC design flow include:

  • Architectural Design. Here, the required functionality of the IC is specified. The capabilities of the specific IC being contemplated will be considered in the context of the system being built. What functions must the IC deliver? What is the required speed and power consumption? What is the target cost of the device?  The answers to these questions will inform subsequent choices for the specific technology that will be used to implement the device. At this stage, “what” is required is most important.  “How” it will be implemented is still not well defined.
  • Logic/Circuit Design. Here, macro-level building blocks are assembled and interconnected to implement the required functionality of the IC. Typically, pre-existing building blocks are used, such as memories, processing units, and sensors. High-level functional descriptions of circuit elements are decomposed into the required low-level circuit elements. This process is automated by software called logic synthesis. The collection of devices is simulated to verify the functionality of the design.  Either a digital logic simulator or an analog circuit simulator will be used, depending on the level of simulation detail that is required. If the macro-level building blocks need to be modified to achieve the requirements of the IC, custom circuit design techniques are used. During this step, “how” the chip will be implemented begins to be defined.
  • Physical Design. During this step, the actual layout of the interconnected shapes that implement all the required circuit elements on the silicon wafer are created. The process begins with a chip “floor plan,” which defines where each of the primary functions of the chip will be located and where the primary input and output ports of the design will be located. The final circuit elements are then placed and routed in preparation for manufacturing. If the macro-level building blocks need to be modified to achieve the requirements of the IC, custom layout techniques, employing an IC layout editor tool, are used.  “How” the chip will be implemented is now fully defined.
  • Physical Verification. All of the physical effects that the manufacturing process adds to the design can now be modeled. Added resistance from wiring, signal crosstalk, and variability in the manufacturing process itself are some of the many items that must be considered here. Will the circuit still work correctly under these stresses? In addition, there are many design rules regarding how the circuit must be physically laid out on the silicon wafer to ensure it will be manufacturable. These design rules are checked at this step as well.
  • Signoff. This is the final step before the design is sent to manufacturing. Here, all of the critical parameters that will impact the performance or manufacturability of the chip are verified against the results of “golden signoff” quality tools. Design rules are fully verified during this step, along with design for manufacturability rules.  The timing, power consumption, and signal integrity of the design are also verified and “closed” during this step. It is critical that accurate parasitic extraction is performed during signoff to ensure the physical effects of the process are well understood. The golden signoff Synopsys tools used during this step include IC ValidatorPrimeTime®PrimePower, and StarRC.

When one considers advanced semiconductor technology, there is another aspect of the IC design flow that becomes important. In advanced manufacturing technology, physical effects and process variability play a major role. For example, the physical resistance of the wires that connect circuit elements can cause significant changes in operating voltages and, thus, overall circuit performance. The variability of the manufacturing process can also create unexpected circuit behavior. To deal with these issues, late effects such as wiring delay and process variation must be modeled and considered early in the design process to ensure these effects are accounted for.

In addition, some aspects of the design, such as how it will be tested and how much power it will consume, need to be modeled and refined at each step of the process. These items are too complex to be dealt with at the end of the design. This process of “looking ahead” is called a Shift-Left approach, and it requires a very sophisticated set of design tools and design flows to support it. 

What solutions does Synopsys offer for IC design?

As the market leader in IC design tools, Synopsys offers a comprehensive suite of capabilities that is fully integrated and able to deliver signoff-quality results and support the sophistication required for Shift-Left  design.

The Synopsys Fusion Design Platform™ delivers the full set of capabilities needed to design, verify, and sign off advanced IC designs. The platform is AI-enhanced and cloud-ready. Tools in the platform include:

  • Design Compiler® NXT. This is the latest innovation in the Design Compiler family of RTL synthesis products, extending the market-leading synthesis position of Design Compiler Graphical
  • TestMAX™. This family of products offers innovative, next-level test and diagnosis capabilities for all digital, memory, and analog portions of a semiconductor device
  • IC Compiler™ IIThis is the industry-leading place-and-route solution that delivers best-in-class quality-of-results for next-generation designs across all market verticals and process technologies, while enabling unprecedented productivity
  • Fusion Compiler. An innovative RTL-to-GDSII product that enables a new era in digital design implementation, offering new levels of predictable quality-of-results to address the challenges presented by the industry’s most advanced designs
  • RTL Architect. Represents the industry’s first physically aware RTL analysis, optimization, and signoff system
  • IC Validator. This is a comprehensive and high-performance signoff physical verification solution that improves productivity for customers at all process nodes, from mature to advanced
  • PrimeTime®. The suite delivers static timing analysis that offers fast, memory-efficient scalar and multicore computing, distributed multi-scenario analysis and ECO fixing using POCV, and variation-aware modeling
  • PrimePower. The family enables accurate power analysis for block-level and full-chip designs starting from RTL, through the different stages of implementation, and leading to power signoff
  • StarRCThe EDA industry’s gold standard for parasitic extraction

The figure below summarizes the elements of the platform. 

Fusion Design Platform | Synopsys

If custom design techniques are required, the Synopsys Custom Design Platform provides a unified suite of design and verification tools that accelerates the development of robust custom IC designs. Built on the Custom Compiler™ custom design environment, the platform features industry-leading circuit simulation performance, a fast, easy-to-use layout editor, and best-in-class technologies for parasitic extraction, reliability analysis, and physical verification.

Platform tools include:

  • Custom Compiler. Providing design entry, simulation management and analysis, and custom layout editing features
  • PrimeSim XAFeaturing the FastSPICE simulator to deliver superior verification performance and capacity for all classes of design
  • IC Validator. A comprehensive and high-performance signoff physical verification solution that improves productivity for customers at all process nodes
  • PrimeSim HSPICEThe gold standard for accurate on-chip simulation and silicon-to-package-to-board-to-backplane signal integrity simulation and analysis
  • StarRCThe gold standard for parasitic extraction
  • PrimeSim SPICE.  A multi-core/multi-machine simulator that is well-suited for the simulation of large, complex analog circuits
  • PrimeWave Design Environment. A graphical waveform viewer and simulation post-processing tool for analog and mixed-signal ICs
  • SiliconSmartA comprehensive array of library characterization and quality assurance capabilities to generate the models required for digital signoff tools such as PrimeTime
  • PrimeSim Reliability AnalysisHSPICE, FineSim, and CustomSim support a comprehensive set of reliability and Monte Carlo analysis features to ensure circuits operate correctly in the face of variability
Custom Design Platform | Synopsys

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