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Design Compiler NXT

Next-generation Design Compiler

Innovation in Design Compiler Family

Design Compiler® NXT is the latest innovation in the Design Compiler family of RTL Synthesis products, extending the market-leading synthesis position of Design Compiler Graphical. Design Compiler NXT technology innovations include fast, highly efficient optimization engines, cloud-ready distributed synthesis, a new, highly accurate approach to RC estimation and capabilities required for the process nodes 5nm and below. 

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"We are collaborating with Synopsys on the latest synthesis technologies in Design Compiler NXT and are looking forward to deploying them on our designs to help meet our ever-increasing pressure of time-to-market and higher QoR."

Tatsuji Kagatani, Vice President, Renesas

The Next Evolution of Synopsys' Digital Toolset

Faster QoR and Advanced Node Ready

Benefits

  • 5% better quality of result for timing and dynamic power, through advanced optimizations including concurrent clock and data 
  • Next-generation process node support, including below 5nm
  • Enhanced physical guidance to IC Compiler II, with improved RC and timing correlation
  • 2X faster runtime, with improved multi-threading technology for better scalability on eight cores
  • Cloud-ready distributed processing, using intelligent workload partitioning
  • Common physical library and block abstract models with IC Compiler II, while retaining support for the Milkyway™ library format
  • Plug-n-play, user interface and script compatible with Design Compiler Graphical

Synopsys Digital and Custom Design Platforms Certified for TSMC's Latest 3nm Process Technology

Synopsys Enables First-Pass Silicon Success for Early Adopters of Next-Generation Armv9 Architecture-based SoCs

Synopsys and Samsung Foundry Collaboration Delivers Optimized Reference Methodology for High-Performance Compute Designs

Case Study: Optimize and Configure Synopsys DesignWare IP with RTL Architect

Want the Best PPA on Arm Cortex-A78 and Cortex-X1? Learn How Using Fusion Compiler

White Papers

RTL Architect: Parallel RTL Exploration with Unparalleled Accuracy

Machine Learning — Everywhere: Enabling Self-Optimizing Design Platforms for Better End-to-End Results

Power Management Becomes Top Issue Everywhere

AI Hardware Demands the Highest Verifiable QoR

Functional Safety Implementation Goes Mainstream

Full-flow Design Platform based on Fusion Technology

Design Compiler NXT, Faster, Better QoR and Advanced Node Ready

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Designer's Digest: PrimeLib Next-Generation Library Characterization Solution

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