Typically, the circuit elements in a PIC schematic are foundry-specific process design kit (PDK) components¹. The process-specific characterization of PDK components for circuit simulations is provided by the foundries. PIC designers can also create custom PDKs for a specific foundry using the RSoft Component Design Suite’s S-Matrix/PDK Generation Utility  and use them in OptSim Circuit  for PIC simulations. Once the simulation results meet design objectives, the next step is to create a netlist in OptSim Circuit for creating its mask in OptoDesigner  and hand over the final graphic database system (GDS) to the foundry .
In OptSim Circuit, the bidirectional optical and electrical signal flow in the circuit is enabled by the connections between the circuit elements. From the circuit simulation perspective, these connections can be ideal (lossless, with no time- or phase delay) or physical (resulting in loss, time-delay and phase-shift). As an example, couplers and waveguides of appropriate dimensions provide physical circuit connections between adjacent photonic components. The connectivity information is used in tools such as OptSim Circuit for simulating physical-layer performance of the PIC. The connectivity information is also used in layout software such as OptoDesigner for placement, routing, and verification during generation of the layout.
Constraints from packaging and design rule checks (DRCs) can impose restrictive routing requirements not foreseen during circuit simulation at the schematic level. Any changes by the layout tool to comply with the packaging and DRCs can potentially result in a PIC with dramatic deviation in its performance compared to the one predicted by the circuit simulation, which in turn affects the yield.
This problem can be significantly alleviated by using so-called “elastic connectors,” also known as “pxConnectors”, at specific locations in the circuit schematic. Figure 2 shows some of the available elastic connectors in the OptSim Circuit model tree.