RSoft Enewsletter

February 2017

OFC Info Session: PIC Design Using OptSim Circuit and PhoeniX Software OptoDesigner

Join us for a special information session on:
March 21, 2017, 10:00 a.m. – 12:00 p.m.
March 22, 2017, 2:00 p.m. – 4:00 p.m. 
Synopsys and PhoeniX staff
Synopsys Booth #2519 at OFC 2017

Presented by Mitchell Heins, Business Development – North America group of PhoeniX Software

At OFC 2017, join this info session presented by PhoeniX Software and Synopsys to learn more about photonic integrated circuit (PIC) design flows from ideas to simulation and fabrication.

Photonic design automation (PDA) tools play a fundamental role in providing designers with powerful features and ease of use. The designer’s ideas are naturally expressed at the circuit level, where the signal behavior is modeled and prototypes can be simulated. Once the desired functionality is achieved, it can be translated into a layout representation by leveraging process design kit (PDK) libraries that have both circuit and layout representations. The PDAFlow-compliant interface between OptSim Circuit and OptoDesigner provides users with a seamless path from idea to realization, from function to mask.

The info session will include demos and design examples in the RSoft OptSim Circuit and PhoeniX OptoDesigner tools, including the American Institute for Manufacturing Integrated Photonics (AIM Photonics) PDK. The presenter and RSoft team will be available for one-on-one discussions with attendees interested in exploring custom PIC solutions and requesting evaluation copies of OptSim Circuit and OptoDesigner.

For more information, please send an email to optics@synopsys.com, or visit Synopsys Booth #2519 at OFC 2017.

Quick Tip: Studying the Mode Evolution Within a Spot Size Converter

Important aspects of a photonic component can be determined by studying the optical modes that the structure supports. While many structures do not vary much over the propagation length and are simple to analyze, other structures vary considerably and require a deeper analysis. This quick tip explores the calculation of mode profiles at specific cross-sections within a knife-edge spot size converter (SSC) structure. More details about the method used can be found in Section 5.D.4 of the BeamPROP manual. The design files used can be accessed on the Customer Support Portal.

SSCs are one of most important components in photonic integrated circuits. Knife-edge SSCs have been reported to have low insertion loss for both TE and TM polarization1,2.  A knife-edge SSC is composed of a width taper and sharp knife-like tip, and converts the light from a lens-tipped single mode fiber into a silicon wire, or vice versa. For this device, it will be useful to understand the change of the mode profiles along the structure. 

Schematic of the knife-edge SSC

Figure 1: Schematic of the knife-edge SSC and the setup of this structure 
in the RSoft CAD Environment

1. Calculate the Mode Profiles at Specific Propagation Positions with BPM Mode Solver

To calculate the mode at a specific Z-position within the structure with BPM mode solver, set the mode_length variable to a specific value in the symbol table. This symbol does two things: it sets the Z-length of the mode calculation; and it artificially extends the structure at the Z domain min for the calculation. For this case, we have set mode_length to 1000. However, you can choose any value that works for your specific structure.

The most important parameters for SSC design are the taper length and shape. One common design approach is to calculate the overlap power along the propagation direction for both the input mode and output mode to see how the power couples within the device. The ideal design will convert most of input mode power into output mode power. Figure 2 shows calculated modes for both TE and TM at several z-cuts with different Si widths and heights. You can see that the profile has been changed from a Si-wire mode to an upper cover second core mode for both polarizations.

electric fields

Figure 2: The main electric fields of the optical modes 
with various Si widths and heights at different taper positions

2. Exploring Effective Index Change of Modes within the Device

We can explore the mode shape within the device by scanning over the Z-domain minimum value. Recall that since we have set the mode_length symbol, it will effectively scan over the structure shape and compute the modes supported at each position. Figure 3(a) shows how the effective index of the TE and TM modes changes along the SSC length. We can see from which z-positions the two respective Neff’s start to converge.

Neff for TE and TM-like modes and Simulated propagation loss

Figure 3: (a) Neff for TE and TM-like modes along SSC positions   
(b) Simulated propagation loss along SSC

This insight can help us better explore what happens within the structure, and can result in a better design. Once designed, we can evaluate the performance of the total device using BeamPROP. BeamPROP propagation results show that the theoretical insertion losses of this SSC are only 0.08dB for TE and 0.1 for TM, as shown in Figure 3(b).

 

References

  1. R. Takei et al, “Silicon knife-edge taper waveguide for ultralow-loss spot-size converter fabricated by photolithography” Applied Physics Letters 102, 101108 (2013).
  2. Yuriko Maegami et al, “Spot-size converter with a SiO2 spacer layer between tapered Si and SiON waveguides for fiber-to-chip coupling”, Opt. Express 23, no.16 (2015).

IODC Lens Design and Illumination Design Competition

The International Optical Design Conference will occur on July 9-13 in Denver, Colorado this year. The lens design and illumination design problems have been posted on the website, and entries are due by April 1, 2017.

International Optical Design Conference

Submit your entries today! For more information, please visit their website:

http://iodc.info/