Collaborate to provide value analog semiconductor solutions
Tower Semiconductor and Synopsys collaborate to provide optimized analog design manufacturing solutions to achieve your design success. For over three decades, Tower Semiconductor has continuously developed and provided high value analog semiconductor solutions. Through its vast knowledge of market needs, Tower offers advanced analog technologies and manufacturing solutions for automotive, infrastructure, consumer, medical, industrial and aerospace and defense, among others. Synopsys, with its decades long experience in EDA and association with the IC design community, has an industry leading offering of design tools. Together, Tower and Synopsys provide fast and accurate design solution for complex designs – like Power Management, CIS, RF, Silicon Photonics and more.
Synopsys' Optimized Design Environment for Tower Process
Synopsys and Tower collaborated to deliver an optimized design environment for Tower process technology based on Synopsys advanced design tools. By teaming together, we are delivering a production-proven design solution based on Synopsys design platforms that allows designers a reliable path to silicon for their challenging SoCs. Using the IPL iPDK based design kit, Tower provides PDKs for the Custom Compiler platform for all it’s leading-edge processes.
Benefits and Features
Enables Fast Track to Tape-out via a mature and proven design flow for RTL/Schematic to tapeout
- Comprehensive library and technology file using SiliconSmart supported via rich characterization features enabling high confidence in first-time design success
- Silicon accurate Spice Hspice models using advanced compact models allow first time design success and accurate library characterization
- Co-developed Custom Compiler iPDKs offering custom design teams a feature-rich analog design platform that minimizes time to market
- One-stop shop with Tower’s industry leading open-foundry silicon photonics (PH18) process and Synopsys’ OptoCompiler design platform for PIC simulation and layout synthesis