Synopsys and Intel Foundry have collaborated for decades to accelerate time-to-volume and increase design productivity. Using Intel’s latest process and packaging technologies along with Synopsys’ end-to-end solutions across EDA and IP, designers can integrate their most essential system requirements into their SoCs. Together, Intel Foundry and Synopsys are enabling companies to drive their next-generation system innovations across a wide range of applications including high-performance computing (HPC), automotive, mobile and aerospace.
Synopsys’ extensive portfolio of digital, custom, and multi-die design solutions enable mutual customers to achieve most optimal results on their next-generation semiconductor products using Intel technologies including Intel 16 and Intel 18A. Collaborating on over 200 design tapeouts using the Fusion Compiler RTL-to-GDSII solution, Intel and Synopsys are accelerating customers’ paths to achieving best PPA and increased differentiation. Synopsys’ 3DIC Compiler platform is production-proven on Intel’s EMIB and Foveros packaging technologies, providing mutual customers with the industry’s most integrated and scalable exploration-to-signoff-analysis solution. The collaboration extends beyond design to silicon lifecycle managment adding an in-chip monitoring sub-system on Intel’s advanced processes to enable greater understanding of in-test and in-field dynamically changing conditions for improved lifecycle operation of customers’ designs.
Synopsys collaborates with Intel to develop high-quality Synopsys Interface and Foundation IP for Intel Foundry’s latest process technologies, delivering the highest throughput, lowest latency and maximum power efficiency for Intel-based SoCs. Synopsys' silicon-proven Interface IP has successfully interoperated with third party products including Intel, ensuring the IP works as intended, so designers can focus on their core competencies and achieve first-pass silicon success. SynopsysFoundation IP delivers the essential building blocks of high-performance, low-power chips. Foundation IP for Intel processes includes embedded memories, logic libraries and general purpose IOs, enabling SoC designers to optimize their CPU, GPU and DSP cores for maximum speed, smallest area, lowest power or an optimum balance of all three.
"Addressing the design and packaging complexities of multi-die architectures requires a holistic approach to solving the thermal, signal integrity, and interconnect challenges. Intel Foundry's manufacturing and advanced packaging technologies, combined with Synopsys' certified multi-die reference flow and trusted IP, provides designers with a comprehensive and scalable solution for fast heterogeneous integration using the Intel Foundry's EMIB technology."
Suk Lee
|VP & GM of Ecosystem Technology Office, Intel Foundry
"Our longstanding, strategic collaboration with Synopsys provides designers with access to industry-leading certified EDA flows and IP that deliver the best performance, power, and area for the Intel 18A technology. This milestone in our collaboration enables mutual customers to boost productivity with AI-enabled EDA flows, achieve the highest utilization, and accelerate development of their advanced designs on the IFS process."
Rahul Goyal
|Vice President and GM for Intel’s Product and Design Ecosystem Enablement Group
"Intel and Synopsys have enjoyed a long-term strategic partnership developing EDA and IP solutions that enable Intel to meet the complex requirements of data-intensive applications. The collaboration with Intel on critical IP development, along with design and system technology optimization, empowers our mutual customers today and in the future to accelerate their next generation of high-performance, AI-enabled designs."
Joachim Kunkel
|General Manager of the Solutions Group at Synopsys