Design Space Optimization (DSO) is a novel approach to searching large design spaces enabled by recent advancements in machine-learning. A marked departure from traditional Design Space Exploration (DSE), where engineers had to manually sweep very large problem spaces for design solutions, DSO is a generative optimization paradigm that uses reinforcement-learning (RL) technology to autonomously search design spaces for optimal solutions.

Chip Design: A Vast Search Space

Today, AI can interact with humans through natural language, identify bank fraud and protect computer networks, drive cars around city streets, and play intelligent games like chess and Go. Chip design is a very large space of potential solutions, trillions of times larger than, for example, the game of Go.

Chip Design Workflow | Synopsys

A chip design workflow typically consumes and generates terabytes of highly dimensional data compartmentalized and fragmented across many separately optimized silos. This data can include:

  • Design Inputs. RTL models, power activity, netlists, floorplans, hierarchy choices
  • Technology Inputs. Device and circuit characteristics, parasitic models, DFM models, metal stacks, design rules
  • Library Inputs. Cell architecture, cell schematics, timing/power attributes, physical characteristics
  • Tool Inputs. Design flow, test vectors, hierarchical partitioning, heuristic settings

Traditional Design Space Exploration: A Manual Process

Searching this vast space is a very labor-intensive effort, typically requiring many weeks of experimentation, and often guided by past experiences and tribal knowledge. To create an optimal design recipe, engineers must ingest volumes of high-velocity data and make complex decisions on the fly with incomplete analysis, often leading to decision fatigue and over-constraining of their design. This manual, iterative, Design Space Exploration (DSE) process has partitioned the problem to manage its complexity. By consequence, the exploration of choices in design workflows has been severely limited, and designers’ productivity has been impacted by a large volume of small decisions.

In today’s hypercompetitive markets and stringent silicon manufacturing requirements, the difference between a good recipe and an optimal recipe can be 100s of MHz of performance; hours of battery life; or millions of dollars in design costs.

DSO: Autonomously Searching & Optimizing Design Spaces

DSO massively scales the exploration of choices in chip design workflows, while automating a high volume of less consequential decisions.

The DSO Agent analyzes large data streams generated by design tools and uses them to make optimization decisions, observing how a design evolves over time and adjusting design choices, technology parameters, and workflows to guide the search process towards multi-dimensional optimization objectives. Searches can be executed at massive scale, with RL-driven decision engines autonomously operating tens-to-thousands of exploration vectors and ingesting gigabytes of high-velocity design analysis data – all in real-time.

Design Space Optimization | Synopsys

A key characteristic of AI-driven process optimization, DSO automates less consequential decisions, like tuning simulation engine settings, or orchestrating experiments, relieving designers of menial tasks and allowing teams to operate at a near-expert level. Once a DSO system builds up models on a given design workflow, the learnings can be shared and applied with high effectiveness across projects and design teams.

AI-grade DSO automation opens up a new growth trajectory for the semiconductor industry, enable companies to build new products and harvest new markets, and design teams to grow and deliver the innovations of tomorrow.

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