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A Must Attend Event
The recent surge in demand for mobile, networking, edge computing and automotive chips has challenged engineers to innovate across multiple domains – power efficiency, footprint and die cost.
Meanwhile, the semiconductor shortage has increased wafer costs and fabrication times, thereby shortening design cycles and making first-pass success a must-have. Shrunk time to market has pushed boundaries of automation and open doors for AI in the domain of VLSI.
Synopsys will address these challenges and trends as we bring you the Synopsys AMS SIG India 2023. Our 10th annual AMS SIG India marks a return to a fully in-person conference on March 21, 2023. You will hear first-hand from world-class semiconductor companies on how they are addressing advanced custom design challenges. You will also learn about the latest advances in Synopsys solutions for analog and mixed-signal design, layout and simulation for robust AMS designs and achieve better results, faster!
This event also includes a panel discussion of industry leaders and visionaries, who will share their perspective on semiconductor industry trends and challenges with emphasis on analog and mixed-signal designs.
Note: Due to limited seating capacity, registration requests will be reviewed.
Keynote Speakers
Lakshmikantha Holla Vakwadi
Senior Director, Engineering
Qualcomm India Private Limited
Antony Fan
VP, Engineering, EDAG
Synopsys
Event Agenda
Please check back to this page as we update our event agenda.
10:00 a.m. IST
On-site Registration & Check-in Opens
Be sure to come early for some coffee/tea before the keynote begins.
10:30 a.m. IST
Welcome Note
10:40 - 11:10 a.m. IST
Industry Keynote | Analog Design Automation – Challenges & Opportunities
Lakshmikantha Holla Vakwadi, Senior Director, Engineering - Qualcomm India Private Limited
11:10 a.m. - 12:30 p.m. IST
User Experience Presentations
A 3nm Custom SRAM Layout Efficiency Improvement using UDD
Ramesh Halli, Jigar Patel - Mediatek
Synopsys Full Custom Flow for Analog SoC Design
Tushar Bhattacharya - AB Circuits and Research Labs
Effective Mixed Signal Verification Methodology for SerDes
Chirag Aggarwal - STMicroelectronics
12:30 - 1:15 p.m. IST
Lunch
1:15 - 2:05 p.m. IST
User Experience Presentations
Enhancing Full Chip CCK SOA Cosim Performance by Optimal Rule Selection Techniques
Hari Kiran Dawat - Micron Technology
Advance Node Embedded Memories Design & Optimization Flow using Synopsys EDA Tools
Amit Basandrai, Neeraj Kapoor, Vijit Gadi - Synopsys
2:05 - 2:35 p.m. IST
Synopsys Keynote | The New Era of Analog & Custom Design Challenges and Productivity
Antony Fan, VP, Engineering, EDAG - Synopsys
2:35 - 3:00 p.m. IST
Networking Break
Enjoy coffee/tea, meet Synopsys experts at technical booth to discuss and learn more about AMS solutions.
3:00 - 3:45 p.m IST
Panel Discussion | Analog Automation Reality or Fiction
Hear from our industry leaders and visionaries, who will share their perspective on semiconductor industry trends and challenges with emphasis on analog and mixed-signal designs.
3:45 - 4:00 p.m IST
Closing Remarks and Lucky Draw
4:00 p.m IST
Hi-Tea and Networking
Enjoy hi-tea and the opportunity to mingle with Synopsys technologists and colleagues.
Contact Us
If you have any questions, please send us an email.
