Cloud native EDA tools & pre-optimized hardware platforms
All members of the design and test community are invited to attend Synopsys 28th Annual Test & SLM Special Interest Group (SIG) at the 2022 International Test Conference (ITC). This year’s event will be hosted by Dr. Ken Butler, Senior Director of Business Development from Advantest. Dr. Butler will be joined by experts from leading companies who will describe how Synopsys’ comprehensive Test and SLM solutions are enabling them to achieve their quality and reliability goals.
Attendees will also have the opportunity to meet with Synopsys experts to discuss and learn more about Test and SLM technologies. Appetizers and cocktails will be served, followed by a sit-down dinner and prize drawings!
Monday, September 26, 2022
6:30 p.m. - 10:00 p.m.
The Westin Anaheim Resort
1030 West Katella Avenue, Anaheim, CA 92802
Online registration has closed, however, walk-ins will be accommodated on-site as space permits
6:30 p.m. - 7:15 p.m.
7:15 p.m. - 7:30 p.m.
7:30 p.m. - 9:00 p.m.
9:00 p.m. - 9:05 p.m.
9:05 p.m. - 10:00 p.m.
Cocktail Reception & hors d'oeuvres
Welcome by Dr. Ken Butler, Advantest
Presentations by: Samsung, Enfabrica, Advantest and Synopsys
Raffle drawing
Dessert & Coffee
Tuesday, September 27
10:30 a.m. - 5:30 p.m.
Wednesday, September 28
9:30 a.m. - 4:30 p.m.
Thursday, September 29
9:30 a.m. - 1:00 p.m.
The Synopsys TestMAX™ family offers innovative test and diagnosis for all silicon designs and enables a unified flow within the Synopsys’ Digital Design Family. Synopsys TestMAX works in conjunction with the latest Synopsys Silicon Lifecyle Management (SLM) technology for enhanced in-chip observability, silicon health and analytics, meeting both design and test goals concurrently.
This year we will be highlighting groundbreaking Test and SLM technologies that encompass integrated tools, IP and methodologies which enable optimized quality, performance and reliability at each phase of the device lifecycle from in-design, in-ramp, in-production and in-field.
See demonstrations on:
If you are interested in scheduling an on-site meeting with Synopsys representatives, please contact us:
Tuesday, September 27
12:00pm - 12:30pm
Thursday, September 29
Friday, September 30
IEEE International Workshop on Silicon Lifecycle Management
IEEE Automotive Reliability and Test & Safety Workshop
Special Session Dedicated to the Memory of Tom W. Williams, Wojciech Maly and Dhiraj Pradhan
New Frontiers in Test Content Optimization
C2.1 Automatic Structural Test Generation for Analog Circuits using Neural Twins
Special Session: Experiences in Silicon Lifecycle Management
E2.2 Sensor Aware Production Testing
Industrial Practices I
E3.1 Application of Sampling in Industrial Analog Defect Simulation
Performing RAS in Today’s Mission Critical Systems
Road to Chiplets: UCIe
Automotive Safety & Security Interoperability
B7.3 Comprehensive Power-Aware ATPG Methodology for Complex Low-power Designs
E7.3 Selective Multiple Capture Test (SMART) XLBIST
General Chair: Yervant Zorian, Synopsys
High Speed IO Access for Test Forms the Foundation for Silicon Lifecycle Management
An Efficient Test Strategy for Detection of Electromigration Impact in Advanced FinFET Memories
Silicon Lifecycle Management Optimizes Vmin Search Enabling Efficient & Reliable Chip Operation
General Chair: Yervant Zorian, Synopsys
Functional Safety Solutions
Empowering Secure and Reliable BIST Solution for Automotive SoC
Evolution and Trends Driving the Automotive Architecture and Ecosystems of the Future
The Accellera Functional Safety Standard: Enabling Automation, Interoperability and Traceability
A Novel Protection Technique for Embedded Memories with Optimized PPA
Wednesday, September 28
12:30 p.m. - 2:00 p.m.
For more information about Synopsys’ comprehensive test solution, visit synopsys.com/test