Automotive In-Vehicle Infotainment Systems

Auto makers are planning the next-generation passenger experience to embrace the content explosion brought by smartphones and cloud connectivity. From embedded functions such as on-board navigation and satellite radio, to gesture recognition and Internet applications, infotainment growth for the connected car is driving the need for flexible and adaptable solutions. Infotainment SoCs supporting real-time multimedia networks and incorporating the latest interface IP standards and protocols in emerging automotive operating systems require a broad, high-quality IP portfolio for automotive applications. Synopsys offers USB, LPDDR4, HDMI, MIPI, PCI Express®, mobile storage, security, data converters, logic libraries, embedded memories, Sensor and Control IP Subsystem, and ARC® and EV vision processors to speed SoC development in the latest 28-nm and 16/14-nm FinFET process technologies. Synopsys also offers Ethernet IP that supports Audio Video Bridging (AVB) and Time Sensitive Networking (TSN) standards, and enables predictable and reliable networks for functional safety ADAS applications.

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ARC CPU

32-bit multi core ARC processors for ADAS & infotainment
Add custom instructions for automotive protocols
Available in dual- and quad-core with I and D caches or cacheless configurations
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Ethernet

10/100/1000 Ethernet controller supporting Audio Video Bridging
Ideal for real-time, multimedia automotive networks
Support for IEEE 1588-2002/2008 for networked clk synch
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MIPI D-PHY

Silicon-proven D-PHY for multimedia ADAS & infotainment
DSI Host controller for high-definition LCD displays
CSI-2 Host controller for high-precision image sensors
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ADC/DAC

High-performance, high-speed 10- and 12-bit at 320 MSPS ADCs
General-purpose, high-resolution ADCs, auxiliary DACs and VDACs
Ideal analog interface for automotive microcontrollers
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Datapath

Achieve area and power reduction using optimized datapath logic
Over 40 instantiable blocks for multimedia and image processing
Data-tracking pipeline management technology to reduce power consumption
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Datapath

Achieve area and power reduction using optimized datapath logic
Over 40 instantiable blocks for multimedia and image processing
Data-tracking pipeline management technology to reduce power consumption
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HDMI

HDMI 1.4 and 2.0 compliant controller and PHY IP
Configurable modes support dual-mode or Tx/Rx-only
Supports Mobile High-Definition Link (MHL) interface
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Advanced Peripherals UART

Popular industry standard interface
Highly configurable to meet specific design requirements
DMA hardware handshaking I/F compatible w/ AMBA peripheral
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Advanced Peripherals SPI/QSPI

Popular industry standard interfaces
Highly configurable to meet specific design requirements
DMA hardware handshaking I/F compatible w/ AMBA peripheral
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SD/eMMC

Storage Host Controller optimized for low power, high performance storage
Fully configurable multi-protocol support
Supports optional integrated DMA
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LPDDR4 PHY & Controller

Scalable LPDDR4/DDR4 architecture with industry-leading data rates
High-performance multi-standard LPDDR4/DDR4 PHY
High-bandwidth and low-latency LPDDR4/DDR4 controller
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AMBA AXI

Interconnect IP for ARM^® AMBA^® 4 AXI, ACE-lite™, AXI3™, AHB™, APB™
Automated AMBA subsystem assembly
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Embedded Memories and Logic Libraries

High-speed/density memory compilers & logic libraries
Optimized for advanced CPUs
High Performance Core Design Kit
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Sensor & Control IP Subsystem

Optimized to process data from digital and analog sensors
Offload host processors for power efficient processing
ARC EM ISO 26262 Functional Safety Package
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USB 3.0 PHY & Controller

Interface to USB 2.0 and USB 3.0 devices
5 Gbps USB 3.0 SuperSpeed read/write performance
Supports both Host and Device operation
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PCIe PHY & Controller

PCIe root port/endpoint with RAS features
High-performance, multi-standard PCIe PHY
Configurable PCIe Controller for PCIe^® 3.1, 2.1 & 1.1
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MIPI I3C Controller

Compliant with the latest MIPI I3C specification
Backward compatible with the I2C slave devices
Supports all data rates up to 33.4 Mbps
In-band interrupts within the 2-wire interface
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Security

Portfolio of Cryptography cores
Protocol accelerators & hardware Root of Trust
Content protection IP for HDCP 2.2 & DTCP-IP
Platform security with secure boot toolkits
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Datapath

Achieve area and power reduction using optimized datapath logic
Over 40 instantiable blocks for multimedia and image processing
Data-tracking pipeline management technology to reduce power consumption
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Highlights

Low latency, multi-port LPDDR4 controller and PHY supporting speeds up to 3200 Mbps offers multi-port access to shared main memory, enabling protocol engines for embedded vision and high-performance heterogeneous processing.
Configurable Ethernet QoS controller is optimized for low latency and supports high-performance automotive applications requiring audio video bridging including the new Time Sensitive Networking (TSN) standards.
MIPI D-PHY and MIPI CSI-2 and DSI controllers meet the latest MIPI specifications and enable multiple camera and display scenarios while meeting power and area requirements.
HDMI and MHL Tx/Rx PHY and controller solutions offer ability to locate ADAS SoC remotely from video system as well as supporting MHL-based smartphone connectivity.
HPC Design Kit with embedded memories optimized for SoC processors: CPU, GPU and DSP are designed for demanding electro migration conditions.
STAR Memory System offers ECC support for multi-bit error correction.
Security IP for HDCP 2.2 offers increased content protection.
Sensor & Control IP Subsystem optimized to process data from digital and analog sensors and offload host processors to enable more power-efficient processing of the sensor data is implemented using Synopsys’ 32-bit ARC EM processor.
EV vision processors offer multicore architecture for object detection implementing convolutional neural network (CNN) with OpenCV and OpenVX software programming environments.
32-bit ARC EM Processor with Safety Enhancement Package (SEP) and ARC EM Safety Island IP support ISO 26262 Functional Safety applications with integrated hardware safety features.
PCI Express® controllers and PHY is optimized for power, performance and area with data protection and reliability features.
SATA 6G Host and Device controller and PHY support both SATA and eSATA including AHCI programming model support multiple ports.
12-bit SAR ADC offers high resolution up to 12-bit, 320MSPS ADC/DAC converters with high dynamic range and high speed for extended application range.