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IP for Automotive ADAS
Synopsys’ DesignWare Automotive IP is implemented using a Functional Safety (FuSa) compliant development flow for ISO 26262 random hardware faults and systematic for ASIL B and D safety levels. Synopsys’ DesignWare IP portfolio for safety-critical automotive SoCs includes functional safety packages, which consist of Failure Modes Effects and Diagnostics Analysis (FMEDA) reports, Safety Manuals, and certification reports to accelerate SoC level safety assessments and help designers reach their target ASILs. Synopsys implements a safety culture, policies, processes, strategies with independent safety managers for FuSa-related IP development. In addition, the DesignWare ARC processors provide SoC level safety manager to monitor, detect and report random failures under normal operation. Synopsys’ high-performance, small area, and low-power IP portfolio, available in advanced FinFET processes, helps designers accelerate ISO 26262 assessment and achieve ASIL targets.
Highlights
- Low latency, multi-port LPDDR5/4/4X controller and PHY provide speeds up to 6400 Mbps for multi-port access to shared main memory
- Configurable Ethernet QoS controller is optimized for low latency and supports high-performance automotive applications requiring audio video bridging including the new Time Sensitive Networking (TSN) standards
- MIPI camera and display IP solutions offer integrated C-PHY/D-PHY IP supporting speeds up to 24 Gbps and MIPI CSI-2 and DSI/DSI-2 controllers
- PCI Express® controller and PHY are optimized for power, performance, latency and area with data protection and reliability features
- CXL IP supports data transfer speeds up to 32 Gbps and cache coherency for faster data access
- Security IP for cryptography and protocol acceleration including platform security and secure boot
- UFS host controller provides high-throughput, low-power, low-latency embedded and removable storage
- HDMI controller and PHY, compliant with the latest HDMI 2.1 specification, deliver the highest digital video & audio experience
- HPC Design Kit with embedded memories optimized for SoC processors: CPU, GPU and DSP are designed for demanding electro migration conditions
- 12-bit SAR ADC offers high resolution up to 12-bit, 320MSPS ADC/DAC converters with high dynamic range and high speed for extended application range.STAR Memory System offers ECC support for multi-bit error correction
- EV Vision Processor offers multicore architecture for fast, accurate object detection, classification and scene segmentation by implementing deep neural network (DNNs) with OpenCV and OpenVX software programming environments
- ARC EM, HS, and EV Functional Safety Processor IP solutions support ISO 26262 functional safety applications with integrated hardware safety features
- Safety Manager IP Subsystem with FuSa SW stack to monitor, detect and report real-time random failures, and perform SoC level LBIST and periodic test operations. implemented using Synopsys’ 32-bit ARC® EM processor