The DesignWare® Universal Flash Storage (UFS) Host Controller IP is a standard-based serial interface engine for implementing the JEDEC UFS interface in compliance with the JEDEC UFS, UFS Host Controller Interface (UFSHCI) standards as well as the UFS removable card v1.1 and Unified Memory Extension (UME) standards. The DesignWare UFS Host Controller IP, compliant with the latest UFS v3.0 standard, is a high-performance, low-power interface that is primarily used in applications where data is stored on embedded or removable non-volatile mass storage memory devices. The UFS Host Controller IP integrates the UFS host controller application layer with a pre-configured DesignWare MIPI® UniPro protocol stack
that is optimized for UFS host applications.
To meet the demand for encryption of data stored on the smartphone’s local storage (contacts, e-mails, etc.), inline encryption has been added to the UFSHCI specification. Synopsys’ implementation of the AES-XTS encryption/decryption block, supporting 256- and 512-bit keys, is part of the data pipeline, ensuring transparency without any performance loss as it does not take any additional CPU cycles.
A standard-based synchronous bus system, such as OCP or AXI, connects the IP to the rest of the system-on-chip (SoC). This bus is connected to the register interface and the Direct Memory Access (DMA) interface of the IP. The register and data structure implementation is based on the UFSHCI specification and is used by the UFS Host Controller’s DMA engine. Leveraging industry standards in the UFS Host Controller ensures compatibility and performance.
When the DesignWare UFS Host Controller IP is combined with the DesignWare® MIPI® UniPro Controller IP and DesignWare MIPI M-PHY IP, Synopsys provides a single vendor UFS IP solution that designers can easily integrate into application processors with less risk, while speeding time-to-market of advanced SoCs and device integrated circuits (ICs).
DesignWare MIPI Complete Solution Datasheet
DesignWare UFS Host Controller Datasheet
Downloads and Documentation
- Compliant with the JEDEC UFS, UFSHCI v3.0 and UFS card v1.1 standards
- Enables data and privacy protection using Inline Encryption (AES-XTS)
- Delivered as UFS host application layer integrated with DesignWare MIPI UniPro v1.8 Controller IP
- Manages UFS protocol between host and external UFS device
- Single traffic class
- Supports M-PHY v4.1 and access to M-PHY attributes
- Supports multiple lanes in HS-Gear4
- Compliant with the Unified Memory Extension (UME) specification
- Low-power operation, small area, and low latency
- Supports clock and power gating using Unified Power Format (UPF)