The DesignWare® Universal Flash Storage (UFS) Host Controller IP is a standard based serial interface engine for implementing a JEDEC UFS interface in compliance with the JEDEC UFS, UFS Host Controller Interface (UFSHCI) standards as well as the UFS removable card v1.0 and Unified Memory Extension (UME) standards. The DesignWare UFS Host Controller IP is a high-performance interface that is primarily used in mobile devices where data is stored on non-volatile mass storage memory devices. The UFS Host Controller IP integrates the UFS host controller application layer with a pre-configured DesignWare MIPI® UniPro protocol stack that is optimized for UFS host application.
A standard-based synchronous bus system, such as OCP or AXI, connects the IP core to the rest of the system-on-chip (SoC). This bus is connected to the register interface and the Direct Memory Access (DMA) interface of the IP. The register and data structure implementation is based on the UFSHCI specification and is used by the UFS Host Controller’s DMA engine. Leveraging industry standards in the UFS Host Controller ensures compatibility and performance. DesignWare MIPI Complete Solution Datasheet DesignWare UFS Host Controller Datasheet