DesignWare DDR IP Solutions

DesignWare DDR IP Solutions

Overview

The DesignWare® DDR Memory Interface IP is a family of complete system-level IP solutions for system-on-chips (SoCs) requiring an interface to one or more of the broad range of high-performance DDR4, DDR3, DDR2, LPDDR, LPDDR2, LPDDR3, and LPDDR4 SDRAMs or memory modules (DIMMs). Optimized for high data bandwidth, low power and enhanced signaling features, the complete DesignWare DDR Memory Interface IP solution includes a choice of scalable digital controllers, an integrated hard macro PHY delivering silicon-proven memory system performance of up to 3200 Mbps per bit, and verification IP. There are seven Synopsys DesignWare DDR PHY IP cores to choose from, as detailed in PHY Details tab, below.

All of the DFI-compatible DDR PHYs are supported by Synopsys' unique DesignWare DDR PHY Compiler. Synopsys' DesignWare Enhanced Universal DDR Memory and Protocol Controller IP features a DFI-compliant interface, low latency and low gate count while offering high bandwidth. Optional market-specific features like AMBA AXI/AXI4 Quality of Service (QoS) and Reliability, Availability and Serviceability (RAS) features allow you to match the area and capabilities of the controllers to your needs.

Synopsys also offers DesignWare HBM2 IP, which provides 12x the bandwidth of DDR4 IP and ten times better power efficiency for graphics, high-performance computing, and networking SoCs.

Are you interested in DDR5 IP? Let us know and we'll contact you with more information. 

DesignWare DDR PHY SDRAMs Supported /
Maximum Data Rate
Interface to Memory
Controller
Typical Application
DDR4/3 PHY DDR4 / 3200 Mbps
DDR3 / 2133 Mbps
DFI 4.0 Design in 28-nm and below that requires high-performance DDR4/3 support up to 3200 Mbps
DDR4 multiPHY DDR4 / 2667 Mbps
DDR3 / 2133 Mbps
LPDDR2 / 1066 Mbps
LPDDR3 / 2133 Mbps
DFI 3.1 Design in 28-nm and below that requires high-performance DDR4/3 support up to 2667 Mbps and/or high performance mobile SDRAM support (LPDDR3/2) up to 2133 Mbps.
LPDDR4 multiPHY LPDDR4 / 3200 Mbps
LPDDR3 / 2133 Mbps
DDR4 / 3200 Mbps
DDR3 / 2133 Mbps
DFI 4.0 Design in 28-nm and below, including 14/16-nm FinFET, that requires high-performance mobile SDRAM support (LPDDR4/3) up to 3200 Mbps and/or high performance DDR4/3 support up to 3200 Mbps for small memory subsystems.
Gen 2 DDR multiPHY DDR3 / 2133 Mbps
LPDDR2 / 1066 Mbps
LPDDR3 / 2133 Mbps
DFI 3.1 Design in 28-nm and below that requires high-performance mobile SDRAM support (LPDDR3/2) up to 2133 Mbps and/or high performance DDR3 support up to 2133 Mbps.
DDR multiPHY DDR3 / 1066 Mbps
DDR2 / 1066 Mbps
LPDDR / 400 Mbps
LPDDR2 / 1066 Mbps
DFI 2.1 Design in 65 - 28-nm that requires DDR3 and/or DDR2 support up to 1066 Mbps along with LPDDR/LPDDR2 support.
DDR3/2 SDRAM PHY DDR3 / 2133 Mbps
DDR2 / 1066 Mbps
DFI 2.1 Design in 65 - 28-nm that requires high performance DDR3 up to 2133 Mbps.
DDR2/3-Lite/mDDR DDR3 / 1066 Mbps
DDR2 / 1066 Mbps
LPDDR / 400 Mbps
DFI 2.1 Design in 65 - 40-nm that requires DDR3 and/or DDR2 support up to 1066 Mbps along with LPDDR support.