Synopsys MIPI I3C Controller IP

Synopsys MIPI I3C Controller IP is compliant with the latest I3C specification and delivers high bandwidth and scalability for integration of multiple sensors into mobile, automotive and IoT system-on-chips (SoCs). The support for in-band interrupts within the 2-wire interface provides significantly lower pin count, simplifying board design and reducing power and cost. The IP is backward compatible with I2C, allowing designers to future proof their design, and the controller and target IP operating modes enable systems with several ICs to efficiently connect to all sensors on a single I3C bus. The standard-based ARM® AMBA® Advanced Peripheral Bus (APB) connects the IP to the rest of the SoC while the bus is connected to the register interface and the Direct Memory Access (DMA) interface, offering easy IP integration.

Low-power management features such as clock gating enable energy-efficient sensors and SoC designs while the configurable transaction and data buffering features enable performance versus cost tradeoffs for the target application.

The Synopsys MIPI I3C Controller IP with Synopsys’ silicon-proven MIPI CSI-2 Controller, D-PHY, verification IP and IP Prototyping Kit enable designers to have a complete image sensor interface solution.

DesignWare MIPI I3C Controller IP Datasheet