SystemC TLM-2.0 Models of Synopsys DesignWare Interface IP
The Synopsys DesignWare® TLM Library provides product development teams a comprehensive set of standards-based, transaction-level models (TLMs) of DesignWare Interface and Standards IP that serve as the building blocks of virtual prototypes for inclusion in VDKs (Virtualizer Development Kits). Virtual prototypes are fast, fully functional software models of systems under development executing unmodified production code and provide higher debugging/analysis efficiency. These virtual prototypes are packaged as part of Virtualizer Development Kits (VDKs) to enable earlier and faster software development. In addition to design-specific virtual prototypes these VDKs also contain the necessary debug and analysis tools and sample software to enable early software bring-up, optimization, testing, and allow communication and development across the embedded device supply chain. The ability to co-design hardware and software through VDKs significantly reduces the product design cycle and speeds time-to-market.
Mirroring the productivity gains realized by IP reuse in the implementation phase, the DesignWare TLM Library accelerates the development of virtual prototypes by providing pre-defined abstract models of hardware components in wireless, multimedia, networking and automotive application domains.