Jitter is a measure of short-term, significant variations of a digital signal from its ideal position in time. If these variations are very slow (within 10 Hz as per the International Telecommunication Union), they are known as wander. Jitter affects the extraction of clock and network timing. Although receivers in OptSim™ do not use clock and data recovery (CDR) circuits, it is possible to analyze jitter-induced penalties using OptSim. The three main sources of jitter are: (i) system-related sources such as crosstalk, dispersion, and reflections/interference; (ii) data-dependent sources such as intersymbol interference and duty-cycle distortion; and (iii) random noise in the system .
Total jitter at a given BER is an important performance metric for high-speed serial I/O links. It is possible to estimate total jitter using bathtub curves, as discussed in the October 2016 issue of the RSoft enews .
This article demonstrates how to use the electrical jitter model  in OptSim to simulate random and deterministic parts of the total jitter.
OptSim’s Electrical Jitter Model
OptSim’s electrical jitter model adds jitter on an electrical signal. This is very useful, for instance, in simulating clock jitter. As we know, the clock jitter results in time-deviation of the sampling instant.
For analysis purposes, this effect can be modeled by skewing the electrical signal before the measurement component and considering an ideal clock that is not jittered.
As shown in Figure 1, the electrical jitter model changes the position of the electrical signal samples as if it were sampled by a jittered clock.