The overall complexity and size of FPGA designs has grown significantly, driving the need for very high quality verification over the past several years. A device failure can result in loss of information, property or worse, life.
Security checking, DO-254 design assurance, superior performance of Verilog and VHDL, UVM methodologies, MATLAB integration, static and formal verification solutions, verification intent specification and traceability, advanced debug capabilities, total coverage models, fault injection capabilities and Triple Modular Redundancy (TMR) for error detection and mitigation for FPGA design flows are methods that have become a requirement in today’s FPGA Aerospace and Defense products.
- Nov 20, 2018
- Herzliya, Israel