SNUG Taiwan

SNUG - Your Innovation, Your Community

SNUG Taiwan 2017

September 6-7, 2017

Ambassador Hsinchu Hotel

SNUG Silicon Valley Keynote

Platinum Sponsors:

Author's Kit

Deliver a Successful SNUG Paper.

Important Dates

April 6, 2017 - Call for Papers Opens

June 1, 2017 - Preliminary Abstract Due (Deadline)

June 5, 2017 - Preliminary Acceptance Notification 

July 6, 2017 - Draft Papers Due

August 10, 2017 - Final Paper and Presentations Due

August 11, 2017 - Presentation Slots Awarded

September 6-7, 2017 - SNUG Taiwan

Technical Committee

SNUG thanks the members of the 2016 Technical Committee who volunteer their time and expertise to ensure SNUG's technical quality, local perspective and value to the users of Synopsys tools and technology.

Shu-Yi Kao, Committee Chairperson, Director, Realtek Semiconductor Corp.

Shu-Yi Kao is Director, Design Technology Department at Realtek Semiconductor Corp.

Ms. Kao joined Realtek in 1999 and is currently Director of Design Technology Dept. She is responsible for design technology, including digital/analog/physical design methodologies, design automation, reusable IP implementation and SoC physical implementation.

Shu-Yi Kao received her B.S. and Master's in Computer Science from National Chiao Tung University, Taiwan.


Dr. Meng-Han Hsieh, Director, Design Platform Division, Design Technology, Mediatek

Meng-Han Hsieh received his Ph.D. in electronic engineering from National Chiao-Tung University, Hsinchu, Taiwan, in 1998. After two years of mandatory military service, he joined Realtek Semiconductor Inc. in 2000. Dr. Hsieh had been involved with leading roles/positions in many key products and technologies development throughout his career in Realtek. 

Major areas of his technical and project leading contributions include Realtek’s Ethernet PHY developments including 10/100/1000 Ethernet PHY and MAC controller, and low power design and methodology of Ethernet products.

In 2011, he joined MediaTek Inc. as the Director of Design Platform Division. Now he is responsible for the design methodology of ESL, design verification and system level profiling technologies.


Wen-Liang Hsu, Director, Nuvoton

Wen-Liang Hsu is Director, CAD Division, at Nuvoton Technology Corporation.

Mr. Hsu’s major focus is in CAD.

Mr. Hsu received BS in Control Engineering, MS in Electronic Engineering from National Chiao-Tung University, and EMBA from National Taiwan University.

Chen-Hsing Lo, Director, MStar Semiconductor 

Chen-Hsing Lo is Director of APR Division at Mstar Semiconductor, Inc. and is responsible for SoC/ASIC implementation, CAD automation, design methodology development and turnkey services to mass production.

Mr. Lo has dedicated more than 19 years to complex SoC implementation and taped out hundreds of chips from 0.35um to 28nm process node. He now handles the APR Division for SoC/ASIC integration and turnkey services.

Chen-Hsing Lo received his Master's degree in Electrical Engineering from Kaohsiung Polytechnic Institute, Kaohsiung.


Cheng-Chih Mao, Director, Silicon Realization Division, Design Technology, MediaTek

Cheng-Chih Mao received his Master's Degree and Bachelor Degree from CN department, National Chiao-Tung University.

CC Mao is now director of Silicon Solution Division Division at MediaTek Inc, responsible for RTL sign-off, timing sign-off, power integrity sign-off, advanced process engagement and related technology. 

CC Mao has rich experience in SoC design flow, project engagement, CAD environment and high performance CPU implementation flow. He now handles Silicon Solution Division for missions of SoC design flow from RTL to GDS.


Dr. Chi-Feng Wu, Senior Director, Realteck Semiconductor Corp.

Dr. Chi-Feng Wu joined RealTek Semiconductor Corp in 2001 and is currently the Senior Director of Processor SoC Platform. He is responsible for design technology of system-on-chip platform, including processor IP, connectivity IP, and software development.

Dr. Chi-Feng Wu received his Bachelor's, Masters and Ph.D. in Electrical Engineering from National Tsing Hua University, Taiwan. His research interests include the design and test of VLSI cores and systems.

Kevin Tseng, Director, Global Unichip Corp.

Kevin Tseng is now the Director of Design Methodology Division at Global Unichip Corp. 

Kevin Tseng is in charge of IC design methodology development for advanced technology nodes (28nm/16nm/7nm ). In the past few years, GUC has been very successful in low power design, advance DFT solution and complex hierarchical SoC design. 

Kevin Tseng received his Master’s degree in in Electronic Engineering from National Chiao-Tung University. 


Kun-Cheng Wu, Associate Vice President, Faraday Technology Corp.

Kun-Cheng Wu is Associate Vice President, SoC & SiP Development and Service at Faraday Technology Corp. 

Kun-Cheng Wu joined Faraday at 1998 and now handles the design service and methodology development for ASIC business. He is a master at design flow and IP technology development and engages the EDA solution to design methodology.

Kun-Cheng Wu received his Master's Degree in Computer Science from National Chiao-Tung University, Hsinchu.


Wen-Hung Wu, Director, ALI Corporation

Wen-Hung Wu is Director of Design Tech. & Service Division at ALI Corporation, responsible for design technology, CAD Automation, SoC integration services, Turnkey services to mass production and manufacturing related technology. 

Wen-Hung Wu has rich experience in SoC design service, high speed bus PI/SI/EMI design, project engagement, CAD environment & methodology planning. He now handles Design Tech. Division for missions of SoC design integration & turnkey services. 

Wen-Hung Wu received his Master degree from VLSI/CAD group of EE department, NCKU & Bachelor's degree from EE department of National Chen Kung University.