In our DesignWare® ARC® EV Embedded Vision Processor family, Synopsys provides fully programmable and configurable IP cores for embedded vision applications. The cores, which marry the flexibility of software with the low cost and low power consumption of hardware, integrate an optional high-performance deep neural network (DNN) accelerator for fast and accurate execution of CNNs. It is neural network-agnostic, so it can run any neural network graph as well as custom graphs.
A recent example of success with the vision processor family comes from Kyocera Document Solutions. The company recently achieved first-pass silicon success for its new MFP SoC using DesignWare ARC EV6x Embedded Vision Processor IP with CNN engine and the DesignWare ARC MetaWare® EV Development Toolkit. With the processor IP, Kyocera gained high-performance AI processing capabilities like super resolution, along with flexibility to support future AI models. To speed up ARC EV software development, SoC integration, and system validation, the company used the Synopsys HAPS® FPGA-based prototyping system. Kyocera’s TASKalfa 3554ci series MFP SoC is the industry’s first AI-enabled MFP SoC for on-demand super-resolution printing.
“Implementing advanced AI functionality into our MFP SoC required high-performance, low-power processor IP with a high-quality tool chain, allowing us to find and test AI algorithms while developing the SoC in parallel,” said Michihiro Okada, general manager, software development division at Kyocera Document Solutions Inc. “Only Synopsys DesignWare ARC EV Processor IP and the mature MetaWare EV Toolkit met our flexibility, performance, accuracy, and area requirements.”
The figures below show the image enhancement results that Kyocera can achieve using DesignWare ARC EV Processor IP.