Arm AMBA AXI Interconnect Test Suites
Writing tests to verify protocols is time consuming, challenging and requires deep protocol and methodology expertise. Synopsys testbenches help eliminate the task of writing compliance tests for today’s complex protocols.
The Test Suite for AMBA AXI is a complete self-contained, configurable environment targeted at the verification of AMBA AXI3 and AXI4 interconnects. It is provided as SystemVerilog UVM source code to simplify integration, enable user customization and maximize reuse across projects. The AXI test suite incorporates Synopsys’ technology leading native-SystemVerilog VC VIP for AMBA.
Test Suite Features
- Support for AMBA 3 AXI and 4 AXI interconnects
- Provided as source code SystemVerilog UVM
- Configurable number of masters and slaves
- Test plan to track pass/fail status referenced to AMBA specifications
- Built-in coverage mapped to test plan
- Test Categories:
- Signal Timing
- Ordering Rules
- Exclusive Access
- Locked Access
- Master-Slave Datapath Coverage
- Zero Delay