Things around us are changing, whether it’s how events are attended, the way silicon is tested or the perception of semiconductor device lifecycles. This year’s SNUG World (formerly SNUG Silicon Valley) is also undergoing change and evolving. It is now a virtual experience, providing an excellent opportunity to share content that Synopsys users want, when they want it, and to enable a dialogue between users and technical experts.
The Silicon Test and Analytics track at the 2021 event offers a real mix of insights and examples from the world of Design-for-Test (DFT), in-chip monitoring, yield management, data analytics and silicon lifecycle efficiency. This exciting new track includes use cases and customer presentations featuring established Synopsys products such as Synopsys TestMAX (Manager, Advisor, ATPG, XLBIST, SMS, Vtran, ALE, SLT) and Yield Explorer as well as new solutions SiliconDash and DesignWare PVT Monitoring.
Synopsys TestMAX represents the semiconductor industry’s most comprehensive test solution that addresses both manufacturing test requirements as well as fast-evolving in-system test requirements for automotive and other functional safety-related applications. The platform delivers a wide range of test support as shown in Fig 1.
Silicon Test and Analytics track attendees will learn more about the capabilities of both the extensive TestMAX range and the Synopsys products that form the new Silicon Lifecycle Management (SLM) platform. Test highlights include using SynopsysTestMAX Manager flow, utilizing TestMAX SMS to enable memory test and repair flow and algorithm programmability to reduce unnecessary timing signoff effort. Also covered is the the ease of migrating DFT implementation to Fusion Compiler while boosting coverage and lowering pattern count.
The Synopsys SLM Platform provides deep insights into critical performance, functionality, reliability, safety, and security issues for the entirety of a chip’s lifes. This enables the optimization of operational activities for all participants throughout the life of the SoC. Value from SLM can be realized by multiple teams including design, bring-up, test and the end-users of systems incorporating these SoCs.
Hardware Monitoring IP from Synopsys DesignWare PVT, TestMAX DFT, and TestMAX XLBIST forms the solid foundation of the SLM platform. At the next level there are two significant modules collecting information from the monitors. The first is an adaptive learning engine; this is software that can be running inside a tester. The other essential element is TestMAX SLT, IP that enables high speed functional interfaces (PCIe, USB) to be used during test time as well as during in-field operation of the chip within a system.
During the in-design phase the Fusion Design Platform™ can be used for design calibration by gathering data from the device under test and performing analysis that can then be fed back into the design phase.
Synopsys Yield Explorer is used for yield ramp analytics to identify the root causes of yield loss. Synopsys SiliconDash is targeted at high volume test and production analytics and is designed to improve the overall efficiency and quality of the tested components.
The end goal of the SLM platform is to achieve predictive analytics when the chips are in their normal operation being able to effectively predict where there may be potential failures.