In-Chip Monitoring and Sensing

Embedded PVT Monitoring

Process, Voltage and Temperature (PVT) monitoring is critical to achieve successful operation and compelling performance of advanced node and FinFET semiconductor devices. Increasing transistor density and routing complexity presents several major challenges to the in-chip management of dynamically changing physical conditions during in-field operation and also in the way devices are manufactured and tested.

Unique Sensing Fabric

Since 2010, Moortec (now part of Synopsys) has supported its global customer base with high accuracy, highly featured and well-supported monitoring subsystem technology. Targeting foundry nodes from 28nm down to 3nm, the high distributed sensing fabric is used today across Data Center, AI, Automotive, 5G and Consumer applications for these reasons:

  • Real-time thermal mapping
  • Energy and power optimization (DVFS, AVS support)
  • Silicon assessment for increased performance
  • Enhanced reliability

Sensor Management Hub

The comprehensive subsystem solution consists of a range of sensors communicating to a central controller (or hub). Configurable by application, the subsystem is easily integrated into the design-flow and architecture of the chip. Developed with digital design, production test development and software design teams and in mind, the monitoring solution connects in to an SoC architecture via standard interfaces for normal and test phase operation. As a major contributor to the Silicon Lifecycle Management (SLM) platform, the flexible monitoring subsystem accommodates the evolving landscape of extended sensor products designed to measure in-chip conditions continuously throughout a silicon chip’s lifetime, from fabrication to end-of-life. The range of sensors provides valuable data which enables powerful analytics algorithms to optimize device performance, enhance reliability and allow for predictive maintenance and failure.

Fig 1. Subsystem Solution for Monitoring and Sensing Configurable by Application 

Key Benefits

Real-Time Analysis

  • Distributed and highly granular thermal mapping across the die
  • Support of reduced electromigration impact
  • Continuous assessment of voltage supply level conditions

Silicon Assessment

  • Process spread measurement during test phase
  • Per-chip optimization for power and speed performance
  • IR drop analysis
  • Age monitoring of silicon during device lifetime

Sensor Management

  • Standard interfacing to SoC architecture for low risk integration
  • Fault flag and health status management for operational reassurance
  • Sensor management tasks for CPU workload reduction
  • Alarm trigger conditions for safer, more reliable chip operation
  • Configurable by application for Data Center, AI, Automotive, 5G and Consumer
  • Silicon Lifecycle Management and analytics support