DesignWare IP for Smart Appliance Applications


The next generation of appliances will provide features such as wireless connectivity and richer user interfaces. Imagine being able to text your appliance or pre-heat your oven and monitor its progress wirelessly. As the market moves toward "smart homes", manufacturers of major appliances are bringing additional value by connecting these appliances to the smart grid. 

Developing SoCs for these smart appliances requires IP solutions that deliver a strong combination of low power, high performance and efficient processing. 

Mouse over or tap to learn more about DesignWare IP solutions:

Bluetooth Low Energy

  • Link Layer and PHY
  • Operates below one volt supply
  • Integrated security functions
  • Supports the latest Bluetooth low energy standard
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  • Cryptographic cores, public key accelerators, TRNG
  • Security protocol accelerators and co-processors
  • Embedded security IP modules establish secure hardware Root of Trust environments
  • Secure boot and cryptography middleware
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ARC EM Processor

  • Ultra-low power, small area 32-bit processors
  • Performance efficiency up to 1.81 DMIPS/MHz
  • Minimal area and power consumption
  • Highly configurable & extensible
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  • Up to 14-bit resolution and up to 5 Msps conversion rates
  • 160 µA / MSPS @ 12-bit mode
  • Multiple power down modes (<0.05 µA)
  • Compact area: ~0.12 mm2 (55 nm)
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  • Operation from single core voltage supply
  • >10,000 write cycle endurance
  • Integrated Error Checking and Correction (ECC) functionality
  • Used to store user configuration, calibration and security data
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  • High-density low leakage memory w/power reduction modes
  • Ultra low voltage operation
  • Deep sleep mode reduces leakage by 70%
  • Long channel devices reduce active leakage
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  • Ultra low power anti-signature ROM
  • Reduces leakage by up to 20%
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Logic Libraries

  • Thick oxide “always-on” libraries for static power savings
  • Multi-bit flops for dynamic power and area savings
  • Power Optimization Kit minimizes core leakage
  • Ultra low voltage operation (40% below Vddnom)
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  • Compatible with AMBA 2.0, AMBA 3 AXI, AMBA 4 AXI and ACE-Lite
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  • Power & area efficient ARC EM processors with configurable and extensible architecture. Ideal for deeply embedded applications including functions such as voice and sensor fusion
  • Thick oxide always-on logic libraries provide the lowest leakage for always-on wakeup circuits during sleep states. Provides low voltage down to 60% VddNom
  • Multi-bit flops minimize clock loading, area and leakage, improving dynamic and static power
  • Power Optimization Kits (POKs) for DesignWare Logic Libraries enable power consumption minimization while sustaining optimal performance
  • Memory compilers with advanced power management features reduce leakage by up to 70%, controlled via a single pin with 0.9V operation
  • Ultra-low power anti-signature via ROM reduces leakage up to 20%
  • Sensor and Control IP Subsystem provides significant area savings with lower latency due to tightly coupled memory and sensor interface peripherals as well as hardware accelerators to improve performance & reduce code size
  • ADC with up to 14-bit resolution and 5 Msps conversion rates exceed leading on-chip implementations
  • Reprogrammable EEPROM NVM IP solutions with no mask adders, minimizing costs. Medium density NVM provides up to 64 KBytes of memory
  • Compact Bluetooth low energy Link Layer and PHYs enable secure wireless connectivity with extended reach, and low power consumption for extended battery life targeting wearables and smart home applications
  • Security IP including Public Key Accelerators, True Random Number Generators and security protocol accelerators and secure hardware root of trust protects against evolving threats