DesignWare IP for Metering & Smart City Applications


Cities are implementing WiFi on buses and trains, installing security cameras on busy intersections, and solving complex parking problems using wireless sensor networks. The Internet of Things will transform how smart cities interact with residents.

Meters have improved in accuracy and precision as well as increased the number of installations, which dramatically enhances our ability to manage and conserve resources. However, these meters must be cost effective to justify their installation and maintenance over the useful life of the device. Reliability, overall cost of ownership, as well as accuracy and precision all play important roles during the design of metering SoCs. Synopsys offers a broad range of IP that meets the area and power requirements for metering applications.

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  • High-density low leakage memory w/power reduction modes
  • Ultra low voltage operation
  • Deep sleep mode reduces leakage by 70%
  • Long channel devices reduce active leakage
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  • Ultra low power anti-signature ROM
  • Reduces leakage by up to 20%
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  • Operation from single core voltage supply
  • >10,000 write cycle endurance
  • Integrated Error Checking and Correction (ECC) functionality
  • Used to store user configuration, calibration and security data
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Logic Libraries

  • Thick oxide “always-on” libraries for static power savings
  • Multi-bit flops for dynamic power and area savings
  • Power Optimization Kit minimizes core leakage
  • Ultra low voltage operation (40% below Vddnom)
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Sensor & Control Subsystem

  • ARC EMxD for battery-operated devices requiring RISC & DSP processing
  • Data Fusion Subsystem for sensor fusion & always-on audio, voice, image processing
  • Support for tightly coupled digital and analog sensors
  • Support for tightly coupled multi-time programmable NVM
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  • Used to store user configuration, calibration & security data
  • Security protocol accelerators and co-processors
  • Embedded security IP modules establish secure hardware Root of Trust environments
  • Secure boot and cryptography middleware
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  • Compliant with the latest MIPI I3C specification
  • Backward compatible with the I2C target devices
  • Supports all data rates up to 26.7 Mbps
  • In-band interrupts within the 2-wire interface
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  • Compatible with AMBA 2.0, AMBA 3 AXI, AMBA 4 AXI and ACE-Lite
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  • Reprogrammable EEPROM NVM IP solutions with no mask adders, minimizing costs. Medium density NVM provides up to 64 KBytes of memory
  • Power & area efficient ARC EM processors with configurable and extensible architecture. Ideal for deeply embedded applications including functions such as voice and sensor fusion
  • ADC with up to 14-bit resolution and 5 Msps conversion rates exceed leading on-chip implementations
  • Thick oxide “always-on” logic libraries provide the lowest leakage for always-on wakeup circuits during sleep states. Provides low voltage down to 60% VddNom
  • Multi-bit flops minimize clock loading, area and leakage, improving dynamic and static power
  • Power Optimization Kits (POKs) for DesignWare Logic Libraries enable power consumption minimization while sustaining optimal performance
  • Memory compilers with advanced power management features reduce leakage by up to 70%, controlled via a single pin with 0.9V operation
  • Ultra-low power anti-signature via ROM reduces leakage up to 20%
  • Bluetooth low energy IP supports down to one-volt operation for extended battery life. Features on-chip transceiver matching network, which reduces the cost of external components and simplifies board design
  • Security IP including Public Key Accelerators, True Random Number Generators and security protocol accelerators and secure hardware root of trust protects against evolving threats