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SNUG Canada 2015 Proceedings

2017 | 2015 | 2014

Complete Proceedings

Speeches
Keynote
Silicon to Software - 'Shift Left'
Author(s): Chi-Foon Chan, President and co-CEO - Synopsys
User Papers and Presentations
A1 - User Session - Testbench Techniques with UVM
Replacing Hardcoded Register Values with Hardcore Abstraction
Author(s): Alex Melikian, Hilmar Van Der Kooij - Verilab Canada
PaperPresentationSession Recording

RESSL UVM Sequences to the Mat
Author(s): Bryan Morris, Jeff McNeal - Verilab Canada
PaperPresentation

Verifying C++ Firmware Sequences in UVM Environment (Best Presentation - 3rd Place)
Author(s): Ashwini Holla - Advanced Micro Devices
PaperPresentationSession Recording
A2 - User & Tutorial Session - PrimeTime PX and Large Scale Design STA
Gaining Confidence in Your Publicized Power Numbers
Author(s): Guy-Armand Kamendjé, Olivier D’Arcy - Huawei Technologies Canada Co., LTD
PaperPresentation
B1 - User Session - Speed Up Your Simulation
Architecting Your Way to Acceleration in UVM (Technical Committee Award)
Author(s): Dean Justus, Paul Lungu - Ciena
PaperPresentation

Method to Partition Your Gate Simulation Debug (Best Presentation - 1st Place)
Author(s): Kendall Chan - Advanced Micro Devices
PaperPresentation

SVAs in IP - The Holy Grail or the Holy Snail
Author(s): Lawrence Said, Markus Pugi - Cisco Systems
PaperPresentation
B3 - User & Tutorial Session - IC Compiler & PrimeTime SI
Experiences Using PrimeTime Physically-Aware ECO Technology
Author(s): Khaled Heloue, Rajit Seahra - Advanced Micro Devices
PaperPresentationSession Recording

Script Based DDR Data Bus Balancing Using IC Compiler (Best Presentation - 2nd Place)
Author(s): Yuri Talaga - Vixs Systems; Jim Lehmann - Synopsys
PaperPresentation
C2 - User & Tutorial Session - SerDes Integration and RTL Power Estimation
Physical and Timing Aspects of Synopsys DesignWare Enterprise 12G SerDes Integration
Author(s): Boris B. Dzerdz - IDT Canada
PaperPresentation
Publication Only
Publish Only
Analysis in Time and Frequency Domain of PMSM Drive in Aerospace Applications
Author(s): Novica A. Losic - Honeywell Aerospace
Publish Only

Analysis of Power Flow in 3-ph Inverters Feeding Inductive Loads in Aerospace Applications
Author(s): Novica A. Losic - Honeywell Aerospace
Publish Only

Correlation Comparison Between DCT Synthesis and IC Compiler Place and Route Using SPG Flow Versus a Non-SPG flow
Author(s): Tom Tsopelas, Don Dattani - Cognitive Systems
Publish Only
Tutorials
A2 - User & Tutorial Session - PrimeTime PX and Large Scale Design STA
Large Scale Design STA - Hierarchical or Flat, Distributed or Single Machine - Which Way to Go for Timing Signoff?
Author(s): Vijay Govindarajan, Synopsys
TutorialVideo
B2 - Tutorial Session - Achieving Optimal QoR with Design Compiler
Achieving Optimal Quality of Results Faster with Design Compiler
Author(s): Tom Wilderotter - Synopsys
Tutorial
B3 - User & Tutorial Session - IC Compiler & PrimeTime SI
Using Data Flow Analysis for Floorplanning
Author(s): Tom Concannon - Synopsys
TutorialVideo
C1 - Tutorial Session - Coverage Closure & Advanced Debug
Advanced Protocol Debug with Verdi³ 2015.09
Author(s): Chris Thompson - Synopsys
Tutorial

Speed Up Coverage Closure with VC FCA & Echo
Author(s): Alex Lorgus, Tyler Bennett - Synopsys
Tutorial
C2 - User & Tutorial Session - SerDes Integration and RTL Power Estimation
Using SpyGlass to Monitor and Reduce Power in Your Design
Author(s): Ken Mason - Synopsys
Tutorial
C3 - Tutorial Session - IC Compiler Update
IC Compiler’s Latest 2015.06 Release Delivers Significant Performance Power Area (PPA) Improvements and Faster Closure on Emerging and Established Nodes
Author(s): Chris Puff - Synopsys
TutorialVideo
Panel Presentation
A3 - Panel Session - IC Compiler II
Unleashing the Power of IC Compiler II - User Experiences
Author(s): Rajit Seahra - AMD; Raj Verma - Qualcomm; Thomas Andersen, Costas Conistis - Synopsys
PresentationVideo
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