SNUG Canada 2014 Proceedings

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Complete Proceedings


User Papers and Presentations
A2 - User Session - VC Low Power and Test
Slacking Off on DFT: Slack-Based Test of Multi-Cycle Paths with a Physical View of Results (2nd Place - Best Presentation)
Author(s): Howard Lu – Semtech; Don Skinner - Synopsys
PaperPresentation

VC LP User Experience
Author(s): Shripad Karodi, Tim Gargrave – Qualcomm
PaperPresentation

A3 - User & Tutorial Session - PrimeTime ECO and Physically Aware ECO
Last Mile Solutions for High Speed Designs in Advanced 16nm Nodes
Author(s): Marat Gershoig, Saman Adham - TSMC
PaperPresentation

B1 - User Session - User Session: Advance Verification Flow
Functional Design Bugs Detected with Low Power Verification
Author(s): Alexander Kryvoshaev – Qualcomm
PaperPresentation

Using VCS Save/Restore to Optimize License Usage
Author(s): Markus Pugi – Cisco Systems
PaperPresentation

What is the Quality of Your DV Environment?
Author(s): Wayne Yun – Advanced Micro Devices, Inc.
PaperPresentation

B2 - Tutorial & User Session - ICC II Walk-through and Multicycle Paths
RTL Designers Can Have a Cake (Low Power) and Eat It Too (Relaxed Path Timing) (Technical Committee Best Paper Award)
Author(s): Boris Hristov – Ciena
PaperPresentation

B4 - User & Tutorial Session - HAPS, Zebu and VDK's
Test IP: Bringing the Tools and Methodology from Pre-Silicon Verification to Post-Silicon Validation
Author(s): Al Czamara, Richard Proto, Paul Tomashevskyi – Test Evolution
PaperPresentation

C1 - User Session - Advance Verification Environment
Snakenado – A Modular and Open-Ended Register Solution
Author(s): Mark Wight, Ryan Lalonde - Ciena
PaperPresentation

SoIP Verification Using the UVM Register Model
Author(s): Michael Bowler – Elliptic Technologies
Presentation

Verification Without DUT
Author(s): Thinh Ngo – Broadcom
PaperPresentation

C3 - User Session - Timing DRCs and Clock Generation
Dynamic Clock Generation with Useful Skew (1st Place - Best Presentation)
Author(s): Ludmila Rubin, Michel Kafrouni - Huawei
PaperPresentation

Topology-aware Net Splitting for Faster Timing DRC Closure (3rd Place - Best Presentation)
Author(s):
PaperPresentation

Publication Only
Publication Only
Analysis of Effects of Rectifier and Induction Motor Loads on Power Quality in Variable Frequency Aerospace Applications
Author(s): Novica A. Losic – Honeywell Aerospace
Paper

Comparative Analysis of Space Vector and Sinusoidal PWM Inverters in Aerospace Applications
Author(s): Novica A. Losic – Honeywell Aerospace
Paper

Tutorials
A3 - User & Tutorial Session - PrimeTime ECO and Physically Aware ECO
PrimeTime ECO – Now Physically Aware
Author(s): Mark DiGiovanni - Synopsys
Tutorial

A4 - Tutorial Session - Custom Designer SAE
A4.2 - Synopsys Custom Design Platform Tutorial
Author(s): Nicolas Regis - Synopsys

SAE: A Flexible, Easy to Use Simulation Cockpit For Analog Designers
Author(s): Alain Mangan - Synopsys
Tutorial

B2 - Tutorial & User Session - ICC II Walk-through and Multicycle Paths
Effective Design using Multi-Cycle Paths with Assertions
Author(s): Alexander Gnusin – Synopsys
Tutorial

IC Compiler II and the Power of 10x - A Product Walk-Through
Author(s): Stelios Diamantidis, Sumit Roy – Synopsys

B3 - Tutorial Session - ICC II Product Walk-Through and FM Ultra
Functional ECOs Made Easier with Formality Ultra
Author(s): Tim Guttormson - Synopsys
Tutorial

IC Compiler II and the Power of 10x - A Product Walk-Through
Author(s): Stelios Diamantidis, Sumit Roy – Synopsys

B4 - User & Tutorial Session - HAPS, Zebu and VDK's
Performance Analysis for the Synopsys DesignWare Universal DDR Memory Controller Using Synopsys Platform Architect MCO
Author(s): Aditya Goswami - Synopsys
Tutorial

Verification of SoC Designs with ZeBu HW Emulator
Author(s): Peter Calabrese - Synopsys
Tutorial

C2 - Tutorial & User Session - 2014 DC Update and Lynx
Design Compiler 2014.09 Highlights
Author(s): Abhijeet Chakraborty - Synopsys
Tutorial

C4 - Tutorial Session - Integrating Siloti and HAPS
Integrating Siloti into Live FPGA Debug
Author(s): Kris Dobecki - Synopsys
Tutorial

Integrating Synphony's High-Level Models with HAPS Prototyping Systems
Author(s): Carl Cleaver - Synopsys
Tutorial

User Presentation
C2 - Tutorial & User Session - 2014 DC Update and Lynx
Enabling Additional Implementation Tasks in Lynx
Author(s): Vincent Rowley - Semtech
Tutorial