Mastering AI Chip Complexity
Explore challenges and solutions in AI chip development
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Why Attend?
Connect with hundreds of product and application developers, business leaders, investors and customers—all focused on embedded vision.
Join Synopsys at the Embedded Vision Summit to see how the latest AI enhancements of the ARC® NPX6 NPU IP portfolio can accelerate your next SoC design. You’ll learn about Synopsys latest NPX6 NPU IP, development tools supporting rapid hardware exploration, neural network based ISPs, and automotive/functional safety capabilities.
With Synopsys, you can address demands of real-time compute and bring visual intelligence into embedded systems, mobile applications, cars, and PCs.
Who Should Attend?
If you are an SoC designer interested in embedded vision, an automotive chip architect for safety-critical radar/vision applications, or an AI and software company, you'll find somthing to enhance your next project at the Embedded Vision Summit.
Synopsys Event Highlights
Demos
Wednesday, May 21, 2025 | 12:30 pm - 7:30 pm
Thursday, May 22, 2025 | 11 am - 5 pm
AI-Powered Low-Light Image Enhancement
Visionary.ai's real-time AI video denoiser, supported by Synopsys ARC® NPX6 NPU IP, delivers superior quality resulting in clearer, sharper images in low light environments
Neural Network Performance Model Analysis with Platform Architect
The Synopsys ARC Metaware MX Development Toolkit includes performance modeling, allowing designers to rapidly explore tradeoffs between different neural network model configurations (MACs, memory, bandwdith, latency, etc.) This capability can be combined with Synopsys's Platform Architect for system level workloads analytics.
Join us to meet Synopsys technical experts, and explore the latest demos and presentations. Don't miss the insightful sessions:
Key Requirements to Successfully Implement GenAI in Edge Devices: Optimized Mapping to the Enhanced NPX6 Neural Processing Unit IP
Gordon Cooper, Principal Product Manager
Date/Time: Thursday, May 22 at 11:25 am
This talk will discuss generative AI trends for edge devices, the role of transformer-based neural networks, and the requirements for NPUs to support these technologies, using examples to illustrate efficient mapping onto Synopsys ARC NPX NPU IP.
Trade-offs and Trends in Data Types for AI
Joep Boonstra, AI Architect and Scientist
Date/Time: Thursday, May 22 at 2:05 pm
This session will cover the pros and cons of state-of-the-art data types for AI, the AI memory wall history, trends, and challenges related to floating-point, quantized, integer, fractional, and ternary data types.