DVCon US 2022

Why Attend?

Synopsys is the world’s leading provider of solutions for designing and verifying advanced silicon chips. Join us at DVCon US 2022 to learn how we help customers optimize chips for power, performance, and cost, cutting months off their project schedules.

Keynote Presentation

Unleashing AI/ML for Faster Verification Closure
Manish Pandey, Synopsys Vice President R&D and Fellow

Design verification is one of the most expensive and time-consuming activities undertaken in electronic system development. Advances in machine learning (ML) algorithms, software and practices in the last few years have given verification engineers a powerful suite of tools to attack this problem. Verification tool builders have leveraged these ML advances to accelerate coverage closure, generate better simulation distributions, and improve core verification algorithms. We will explore how exploiting supervised, unsupervised and reinforcement learning have enabled order of magnitude gains in closure convergence and verification cycle reduction.

Synopsys Engagement

Sponsored Session

Title: Embracing a Software-first Strategy to Address Growing System Validation Complexity

Abstract: This presentation discusses how innovative hardware platforms are being used to address increasing systemic complexity driven by complex, interconnected environments with dramatically increasing software workloads. Using these platforms, the industry is embracing a software-first approach across segments such as automotive, HPC, and 5G to fuel semiconductor innovation in the SysMoore era.


Sponsored Tutorial

Title: Is your Hardware Dependable? – Practical Applications for Managing Security and Safety from Software to Silicon

Presenters: Meirav Nitzan, Synopsys; Balaji Venu, Arm; Reiley Jeyapaul, Arm; Bala Chavali, AMD; Serge Leef, DARPA

Abstract: The development of secure and safe systems is of paramount importance in this age of vertically integrated electronic systems. The dependability of a system reflects the user's degree of trust in that system. It reflects the extent of the user's confidence that it will operate as users expect and that it will not 'fail' in normal use. Dependability covers the related systems attributes of reliability, availability, and security. ​

Security weaknesses in the SoC hardware can lead to vulnerabilities that may be exploited later on by malicious intent in software or hardware. These challenging problems must be addressed pre-silicon and require rigorous methodology combined with technology to provide increased security assurance. Safety assurance requires a full product life cycle approach and is also tightly linked with security and lack of one, jeopardizes the other.​

In this tutorial, leading-edge SoC companies and Synopsys experts will discuss the safety and security solution for a hardware development lifecycle to achieve pre-silicon signoff.  Users will also learn the recommended methodology and best practices to address common weakness enumerations (CWE) and add counter measures to build threat and fault resilient designs.​

*Requires all-access DVCon pass to view session on-demand.


Sponsored Workshop

Title: Finding Hidden Bugs In Deep Cycles – Advanced Debug Methodologies for Software-first System Validation

Presenters: Andy Jolley, Synopsys; Yousef Qassid, Synopsys

Abstract: With the complexity of today’s software the length of workloads to validate hardware and software has increased to 100s of billions of cycles. As teams adopt a software-first validation strategy, modern emulation and prototyping platforms are needed to enable the highest performance as well highly efficient debug technology. ​

In this two-part workshop (part 1: emulation, part 2: prototyping) we will use a multi-processor design case study to illustrate how emulation with ZeBu® EP1 emulation system and HAPS®-100 FPGA prototyping are ideal platforms to achieve software-first system validation. We will show how to rapidly identify design issues using emulation and run extremely long scenarios to find the deep cycle issues using prototyping.

*Requires all-access DVCon pass to view session on-demand.

Visit Synopsys' Virtual Booth 

Stop by to see how we deliver comprehensive verification solutions spanning the complete design cycle, including simulation, emulation, advanced debug, static/formal verification, FPGA-based prototyping and virtual prototyping.